Circuits and method for multi-level data through a single input/output pin
AssigneeMicron Technology, Inc.
InventorScott J. Derner
Life of this patent
Estimating the term…
Abstract
A method and memory circuits for increasing the data bandwidth per microprocessor operation cycle is provided. The memory circuits provide the additional bandwidth without additional input/output (I/O) pins or requiring decreased cycle times. Multiple bits of data are passed through a single input/output pin with each operation cycle. The multiple bits of data are stored in or retrieved from multiple memory cells in each cycle. The I/O pins carry analog signals which represent multiple values of binary data. This method of compressing data can be applied to any device that would benefit from the ability to transfer more data through a limited number of I/O pins.
Claims38
An electronic system having a number of input/output pins, the electronic system comprising:
- a number of logic circuits, wherein the number of input/output pins couple to the number of logic circuits;
- a number of input/output lines coupled to the number of logic circuits;
- and
- wherein the number of logic circuits use multiple voltage levels to control inputting bits of data to more than one input/output line or to control outputting bits of data from more than one input/output line using a single input/output pin.
A semiconductor circuit, comprising:
- a number of input/output pins;
- a number of logic circuits, wherein the number of input/output pins couple to the number of logic circuits;
- a number of input/output lines coupled to the number of logic circuits;
- and
- wherein the number of logic circuits have multiple inputs and outputs each coupled to a subset of the input/output lines, wherein the outputs of at least one of the number of logic circuits individually couple to a number of pull-up or pull-down transistors, wherein the input of at least one of the number of logic circuits couples to a number of comparators, and wherein the number of logic circuits use multiple voltage levels to input bits of data to or output bits of data from more than one input/output line.
An integrated circuit comprising:
- a number of input/output pins;
- a number of input/output lines;
- a number of first logic circuits, each first logic circuit coupled to the number of input/output lines;
- for each first logic circuit, a number of pull-up transistors and a pull-down transistor coupled between one of the number of input/output pins and the first logic circuit for outputting bits of data from the number of input/output lines onto the one input/output pin;
- a number of comparators coupled to each input/output pin, wherein each comparator is connected to a distinct voltage reference;
- and
- a second logic circuit coupled to the number of comparators for an input/output pin;
- and wherein the second logic circuit couples to the number of input/output lines for inputting bits of data from the input/output pin to the number of input/output lines.
An electronic system having a number of input/output pins, the electronic system comprising:
- a number of logic circuits, wherein the number of input/output pins couple to the number of logic circuits;
- a number of input/output lines coupled to the number of logic circuits wherein the number of logic circuits includes:
- a read logic circuit coupled to at least two input/output lines;
- and
- a pull-up/pull-down circuit coupled between the read logic circuit and a single input/output pin;
- and
- wherein the number of logic circuits use multiple voltage levels to control inputting bits of data to the at least two input/output lines or to control outputting bits of data from the at least two input/output lines using said single input/output pin.
An electronic system having a number of input/output pins, the electronic system comprising:
- a number of logic circuits, wherein the number of input/output pins couple to the number of logic circuits;
- a number of input/output lines coupled to the number of logic circuits wherein the number of logic circuits includes:
- a comparator circuit coupled to one of the number of input/output pins;
- and
- a write logic circuit coupled between the comparator circuit and at least two input/output lines;
- and
- wherein the number of logic circuits use multiple voltage levels to control inputting bits of data to the at least two input/output lines or to control outputting bits of data from the at least two input/output lines using a single input/output pin.
An electronic system having a number of input/output pins, the electronic system comprising:
- a number of logic circuits, wherein the number of input/output pins couple to the number of logic circuits;
- a number of input/output lines coupled to the number of logic circuits wherein the number of logic circuits includes:
- a read logic circuit coupled to at least two input/output lines;
- a pull-up/pull-down circuit coupled between the read logic circuit and a single input/output pin;
- a comparator circuit coupled to the single input/output pin;
- and
- a write logic circuit coupled between the comparator circuit and the at least two input/output lines;
- and
- wherein the number of logic circuits use multiple voltage levels to control inputting bits of data to the at least two input/output lines or to control outputting bits of data from the at least two input/output lines using said single input/output pin.
Dependencies are inferred from the claim text.