Memory incorporating column register and method of writing in said memory

An integrated circuit memory comprising:

• a memory plane with at least one memory word of 2p cells, each connected to a respective bit line, where p is a non-zero whole number wherein the memory plane comprises a column register comprising:
• 2q high-voltage latches, where q is a whole number less than p, each of the high-voltage latches comprising high-voltage memorization means for memorizing a binary data in the form of one of a high programming voltage and a zero voltage, coupled to conditional and selective switching means to bring to the high programming voltage a determined bit line among 2p−q bit lines;
• and
• 2p−2q low-voltage latches, each comprising low-voltage memorization means for memorizing a binary data in the form of one of a low supply voltage and a zero voltage, and coupling means at the input of one of the high-voltage latches, which can be activated to load into said high-voltage latch the binary data memorized in the low-voltage latch.