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US 6,307,768 B1Granted
Bitline twist with equalizer function
AssigneeInfineon Technologies Richmond, LP
InventorUlrich Zimmermann
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a plurality of bitlines arranged in an array, the plurality of bitlines being grouped in pairs and at least some of the bitlines include a twist. A twist region is disposed along the plurality of bitlines wherein the twist region occupies layout area designated for the twists. An equalizer element is disposed in the twist region for equalizing a pair of bitlines.
Claims22
A semiconductor device, comprising:
- a plurality of bitlines arranged in an array, the plurality of bitlines being grouped in pairs and at least some of the bitlines include a twist;
- a twist region disposed along the plurality of bitlines wherein the twist region occupies layout area designated for the twists;
- and
- an equalizer element disposed in the twist region for equalizing a pair of bitlines.
1 more element
A semiconductor device, comprising:
- a plurality of bitlines arranged in an array, the plurality of bitlines being grouped in pairs and at least some of the pairs of bitlines include a twist;
- a twist region disposed along the plurality of bitlines wherein the twist region occupies layout area designated for the twists;
- a first equalizer element disposed in the twist region for equalizing a pair of bitlines;
- and
- a second equalizer element disposed in the twist region for equalizing bitlines between pairs of bitlines.
2 more elements
Dependencies are inferred from the claim text.