US 6,307,588 B1Granted

Method and apparatus for address expansion in a parallel image processing memory

AssigneeCognex Corporation

InventorsSteven J. Olson, Robert C. Hinz, Kurt M. Anderson

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Abstract

A method and apparatus for image processing provides a memory having a plurality of individual parallel buffers constructed from random access memories (RAMs) for storing data related to a group of image pixels. The buffers each store a parallel, identical version of the image data so that an image processor can access data related to a given pixel in the overall data from each buffer simultaneously. An address expander for the buffer rows and buffer columns is used to convert a row and column address of a selected “central” pixel into a plurality of related pixel data addresses offset at predetermined distances from the selected pixel data's address. In this manner, the address expanders enable a group of related pixels, each in a different parallel buffer, to be accessed simultaneously, without requiring the processor to be interconnected with all of the buffers. This substantially reduces the complexity of processor interconnection design, while substantially enhancing processor speed.

Claims14

Dependent claims

A system for processing a group of image pixel data comprising:

a plurality of random access memories, each of the memories having addresses that are arranged identically to each other, each of the random access memories storing the group of image pixel data at the identical addresses, wherein each of the addresses is constructed and arranged to store an image pixel data of the group of image pixel data;
an image processor that generates address values for accessing the group of image pixel data over a multi-bit address line and that manipulates the group of image pixel data;
an address expander interconnected with the multi-bit address line, the address expander being constructed and arranged to convert a selected address in each of the memories into a plurality of related addresses in each of the memories, related image pixel data from the group of image pixel data being stored at the plurality of related addresses, a selected image pixel data from the group of image pixel data being stored at the selected address, and each of the related addresses being located at a predetermined offset relative to the selected address;
and
a plurality of address expander address lines that transmit the plurality of related addresses to each of the plurality of random access memories so that the processor accesses each of the plurality of related image pixel data over the multi-bit data line.

2 more elements

A method for processing a group of image pixel data comprising:

establishing a plurality of random access memories, each of the memories having addresses that are arranged identically to each other, the step of establishing including storing in each of the random access memories the group of image pixel data at the addresses, wherein an image pixel data of the group of image pixel data is stored in each of the addresses of each of the random access memories;
generating, with an image processor, address values for accessing the group of image pixel data over a multi-bit address line and manipulating the group of image pixel data transferred between the image processor and the random access memories over a multi-bit data line;
providing an address expander interconnected with the multi-bit address line, the step of providing including converting, with the address expander, a selected address in each of the memories, a selected image pixel data from the group of image pixel data being stored at the selected address, into a plurality of related addresses in each of the memories, related image pixel data from the group of image pixel data being stored at the plurality of related addresses, and each of the related addressed being located at a predetermined offset relative to the selected address;
and
transmitting, over a plurality of address expander address lines, the plurality of related addresses to each of the plurality of random access memories so that the processor accesses each of the plurality of related image pixel data over the multi-bit data line.

2 more elements

Dependencies are inferred from the claim text.