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US 6,307,491 B1Granted
Trim systems and methods having temporary and permanent operational modes
AssigneeAnalog Devices, Inc.
InventorsCarl W. Moreland, Russel G. Stop
Life of this patent
Estimating the term…
Abstract
Latch systems and methods are configured to temporarily latch trim signals in experimental combinations of set and reset states and, subsequently, to permanently latch the trim signals in a preferred combination (i.e., a combination that optimizes the performance parameters of an electronic circuit). Latch systems of the invention include a latch, a reset driver, a temporary-set driver and a permanent-set driver and are particularly suited for determining a preferred combination of set and reset states prior to permanently latching this preferred combination.
Claims12
A latch system that provides temporary and permanent set and reset trim signals for trimming an electronic circuit, comprising:
- a latch that generates said set and reset trim signals in respective response to set and reset latch signals;
- a reset driver that applies said reset latch signal to said latch;
- a temporary-set driver which removes said reset latch signal from said latch in response to a mode-select signal and which applies said set latch signal to said latch in response to a state-select signal, said latch thereby generates said temporary set trim signal when said mode-select signal and said state-select signal are present and generates said temporary reset trim signal when said mode-select signal is present and said state-select signal is absent;
- and
- a permanent-set driver which includes a trimmable link and which, in response to the trimming of said link, removes said reset latch signal from said latch and applies said set latch signal to said latch, said latch thereby generates said permanent set trim signal when said mode-select signal is absent and said trimmable link is trimmed and generates said permanent reset trim signal when said mode-select signal is absent and said trimmable link is not trimmed.
2 more elements
A precision digital-to-analog converter that converts a digital input signal into an analog signal at an output port, comprising:
- a binary-weighted current source that generates binary-weighted currents;
- current switches which each couple a respective one of said binary-weighted currents to said output port in response to a respective bit of said digital input signal;
- bidirectional-trim digital-to-analog converters that generate, in response to respective set and reset trim signals, respective bidirectional trim currents with respective amplitudes and directions;
- and
- an array of latch systems that provide both temporary and permanent set and reset trim signals;
- wherein each of said bidirectional-trim digital-to-analog converters is coupled to provide its bidirectional trim current to a respective one of said current switches for a linearizing adjustment of that switch's binary-weighted current;
- and wherein each of said latch systems includes:
- a) a latch that generates said set and reset trim signals in respective response to set and reset latch signals;
- b) a reset driver that applies said reset latch signal to said latch;
- c) a temporary-set driver which removes said reset latch signal from said latch in response to a mode-select signal and which applies said set latch signal to said latch in response to a state-select signal, said latch thereby generates said temporary set trim signal when said mode-select signal and said state-select signal are present and generates said temporary reset trim signal when said mode-select signal is present and said state-select signal is absent;
- and
- d) a permanent-set driver which includes a trimmable link and which, in response to the trimming of said link, removes said reset latch signal from said latch and applies said set latch signal to said latch, said latch thereby generates said permanent set trim signal when said mode-select signal is absent and said trimmable link is trimmed and generates said permanent reset trim signal when said mode-select signal is absent and said trimmable link is not trimmed.
9 more elements
A subranging analog-to-digital converter system that converts an analog input signal to a corresponding digital output signal, comprising:
- an initial analog-to-digital converter that converts said analog input signal to an initial set of digital bits of said digital output signal;
- a precision digital-to-analog converter that converts said respective set of digital bits to a converted analog signal at a converter output and subtracts said converted analog signal from said analog input signal to form an analog residue signal;
- and
- a final analog-to-digital converter that converts said analog residue signal to a final set of digital bits of said digital output signal;
- wherein said precision digital-to-analog converter includes:
- a) a binary-weighted current source that generates binary-weighted currents;
- b) current switches which each couple a respective one of said binary-weighted currents to said converter output in response to a respective bit of said initial set of digital bits;
- c) bidirectional-trim digital-to-analog converters that generate, in response to respective set and reset trim signals, respective bidirectional trim currents with respective amplitudes and directions;
- and
- d) an array of latch systems that provide both temporary and permanent set and reset trim signals;
- wherein each of said bidirectional-trim digital-to-analog converters is coupled to provide its bidirectional trim current to a respective one of said current switches for a linearizing adjustment of that switch's binary-weighted current;
- and wherein each of said latch systems includes:
- a) a latch that generates said set and reset trim signals in respective response to set and reset latch signals;
- b) a reset driver that applies said reset latch signal to said latch;
- c) a temporary-set driver which removes said reset latch signal from said latch in response to a mode-select signal and which applies said set latch signal to said latch in response to a state-select signal, said latch thereby generates said temporary set trim signal when said mode-select signal and said state-select signal are present and generates said temporary reset trim signal when said mode-select signal is present and said state-select signal is absent;
- and
- d) a permanent-set driver which includes a trimmable link and which, in response to the trimming of said link, removes said reset latch signal from said latch and applies said set latch signal to said latch, said latch thereby generates said permanent set trim signal when said mode-select signal is absent and said trimmable link is trimmed and generates said permanent reset trim signal when said mode-select signal is absent and said trimmable link is not trimmed.
14 more elements
Dependencies are inferred from the claim text.