Gate driver circuit for high and low side switches with primary and secondary shoot-through protection

A driver circuit for alternately driving a first transistor and a second transistor in response to a switch control signal, said first transistor being connected in series with a second transistor between a first power supply and a second power supply, comprising:

• a first driver circuit portion for driving a control terminal of said first transistor in response to said switch control signal, said first driver circuit portion comprising:
• a first driver device and a second driver device connected in series between said first power supply and said second power supply, said first and second driver devices generating a control signal at an output node between said first and second driver devices, said control signal being coupled to said control terminal of said first transistor for controlling an on-off state of said first transistor;
• a first logic circuit having a first input terminal coupled to receive said switch control signal, a second input terminal coupled to receive a first lock-out signal, and an output terminal, said first lock-out signal indicating an on-off status of said second transistor, and said switch control signal having a first state for turning said first transistor on and turning said second transistor off, and a second state for turning said second transistor on and turning said first transistor off;
• a second logic circuit for providing an OR function having a first input terminal coupled to said output terminal of said first logic circuit, a second input terminal coupled to receive a second lock-out signal, and an output terminal;
• a first amplifier having an input terminal coupled to said output terminal of said second logic circuit and generating an output signal for driving said first driver device;
• a third logic circuit for providing an AND function having a first input terminal coupled to said output terminal of said first logic circuit, a second input terminal coupled to receive said second lock-out signal, and an output terminal;
• a second amplifier having an input terminal coupled to said output terminal of said third logic circuit and generating an output signal for driving said second driver device;
• a first inverter having an input terminal coupled to said output terminal of first logic circuit and an output terminal coupled to said output node of said first and second driver devices, said output terminal generating a third lock-out signal for said second transistor;
• and
• a delay element coupled to said output node of said first and second driver devices and generating said second lock-out signal.

A method for alternately driving a first transistor and a second transistor connected in series in response to a switch control signal, comprising:

• generating a first lock-out signal indicating an on-off status of said first transistor, wherein said first lock-out signal transitions a first delay time after a transition said switch control signal;
• preventing said second transistor from turning on when said first lock-out signal indicates said first transistor is turned on;
• turning off said first transistor in response to a transition of said switch control signal;
• and
• turning on said second transistor when said first lock-out signal indicates said first transistor is turned off, said turning on comprising:
• driving a control terminal of said second transistor to a first voltage level using a first driver device, thereby turning on said second transistor;
• turning off said first driver device after said second transistor is turned on;
• and
• driving said control terminal of said second transistor using a first holding device.

A method for driving a first transistor, connect in series with a second transistor, in response to a switch control signal, comprising:

• turning on said first transistor in response to said switch control signal, said turning on comprising:
• driving a control terminal of said first transistor to a first voltage level using a first driver device, thereby turning on said first transistor;
• turning off said first driver device after said first transistor is turned on;
• and
• driving said control terminal of said first transistor using a first holding device.