Monolithic low dielectric constant platform for passive components and method

A silicon substrate including a dielectric platform comprising:

• a dielectric lattice including an array of holes having a depth that is greater than a width of the holes, sidewalls of the holes being formed from silicon based dielectric and having a thickness of less than one micron, the width of the holes being less than two microns;
• a seal formed at tops of the holes;
• a silicon area adjacent the dielectric platform that is suitable for formation of active electronic circuitry;
• a cavity formed beneath the holes in the array and coupled to multiple holes in the array;
• and
• one or more pillars extending from a bottom of the cavity to the dielectric lattice.

A dielectric platform formed in a silicon substrate by a method comprising:

• forming a mask on a top surface of the substrate;
• etching an array of holes in the substrate, the holes each having a depth that is greater than a width of the holes, the width of the holes being less than two microns;
• oxidizing sidewalls of the holes to provide a dielectric lattice, sidewalls of the holes being formed from silicon dioxide and having a thickness of less than one micron;
• etching through the array of holes to form a cavity beneath the holes, the cavity including one or more pillars extending from a bottom of the cavity to the lattice;
• forming a seal at tops of the holes such that the cavity includes a gaseous dielectric;
• and
• planarizing a top surface of the seal using a chemical-mechanical polish.