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US 6,307,237 B1Granted
L-and U-gate devices for SOI/SOS applications
AssigneeHoneywell International Inc.
InventorDavid Owen Erstad
Life of this patent
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Abstract
A semiconductor device is disclosed that eliminates at least one of the channel/dielectric interfaces along the side walls of an SOI/SOS transistor channel, but does not require the use of a dedicated body tie contact. Because a dedicated body contact is not required, the packing density of the device may be significantly improved over conventional T-gate and H-gate configurations. The present invention may also reduce the overall gate area, which may increase both the speed and overall yield of the device.
Claims36
A semiconductor device comprising:
- active region formed on an insulating layer and surrounded by an isolation region, the active region having a top edge, a bottom edge, a first lateral edge, and a second lateral edge;
- a first L-shaped gate having a first leg and a second leg;
- the first leg of the first L-shaped gate spaced inward from the first lateral edge and spaced inward of the second lateral edge, and extending into the active region over the top edge;
- the second leg of the first L-shaped gate spaced inward of the top edge and extending into the active region over the first lateral edge, the second leg of the first L-shaped gate intersecting the first leg of the first L-shaped gate but not extending to the second lateral edge;
- a first drain region defined by the first lateral edge, the first leg of the first L-shaped gate, the top edge and the second leg of the first L-shaped gate;
- a source region defined by the second lateral edge and the first L-shaped gate;
- the source region and the drain region having a first conductivity type;
- the active region under the first leg and the second leg of the first L-shaped gate having a second conductivity type;
- a first implant region having the second conductivity type extending from a portion of the first L-shaped gate into at least a portion of the source region;
- and
- a first electrically conducting layer extending over at least a portion of the first implant region and the source region for electrically connecting the first implant region to the source region.
8 more elements
A semiconductor device comprising:
- an active region formed on an insulating layer and surrounded by an isolation region, the active region having a top edge, a bottom edge, a first lateral edge, and a second lateral edge;
- a first U-shaped gate having a first leg, a second leg and a third leg;
- the first leg of the first U-shaped gate spaced inward from the first lateral edge and inward of the second lateral edge;
- the second leg of the first U-shaped gate extending into the active region over the first lateral edge, the second leg of the first U-shaped gate intersecting the first leg of the first U-shaped gate but not extending to the second lateral edge;
- the third leg of the first U-shaped gate spaced from the second leg of the first U-shaped gate, the third leg of the first U-shaped gate extending into the active region over the first lateral edge and intersecting the first leg of the first U-shaped gate but not extending to the second lateral edge;
- a first drain region defined by the first lateral edge, the first leg of the first U-shaped gate, the second leg of the first U-shaped gate and the third leg of the first U-shaped gate;
- a source region defined by the second lateral edge and the first U-shaped gate;
- the source region and the drain region having a first conductivity type;
- the active region under the first leg, the second leg and the third leg of the first U-shaped gate having a second conductivity type;
- a first implant region having the second conductivity type extending from a portion of the first U-shaped gate into at least a portion of the source region;
- and
- a first electrically conducting layer extending over at least a portion of the first implant region and the source region for electrically connecting the first implant region to the source region.
9 more elements
Dependencies are inferred from the claim text.