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US 6,307,233 B1Granted
Electrically isolated double gated transistor
AssigneeTexas Instruments Incorporated
InventorsKaoru Awaka, Masashi Hashimoto, Masaaki Aoki
Life of this patent
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Abstract
A gated field effect transistor (gated-FET) in which the body of the FET is electrically isolated from the substrate thereby reducing leakage current through parasitic bipolar action. The back-bias of the channel of the FET is jointly controlled by a diode coupled with a capacitor.
Claims10
A double-gate-driven p-channel FET, comprising:
- (a.) a semiconductor substrate;
- (b.) a first n-type well diffusion layer in said substrate;
- (c.) a p-type well diffusion layer in said first n-type well diffusion layer;
- (d.) a second n-type well diffusion layer in said p-type well diffusion layer;
- (e.) two p-type source/drain diffusion layers in said second n-type well diffusion layer, defining a channel therebetween;
- (f.) a gate connected to said well diffusion layer to control inversion of said channel;
- (g.) a diode, and an additional coupling capacitance, which jointly control the back-bias of said channel;
- (h.) said well diffusion layer being isolated from said substrate;
- (i) said substrate being biased to a reference voltage;
- (j) said first n-type well diffusion layer being biased to the supply voltage;
- and
- (k) said p-type well diffusion layer being biased to a value greater than or equal to the magnitude of the source voltage minus the magnitude of a cut-in voltage of said diode.
9 more elements
A double-gate-driven n-channel FET, comprising:
- (a.) a semiconductor substrate;
- (b.) an n-type well diffusion layer in said substrate;
- (c.) a p-type well diffusion layer in said n-type well diffusion layer;
- (d.) two n-type source/drain diffusion layers in said second p-type well diffusion layer, defining a channel therebetween;
- (e.) a gate connected to said well diffusion layer to control inversion of said channel;
- (f.) a diode, and an additional coupling capacitance, which jointly control the back-bias of said channel;
- (g.) wherein said well diffusion layer is isolated from said substrate;
- (h) said substrate being biased to a reference voltage;
- and
- (i) said n-type well diffusion layer being biased to a value greater than or equal to zero and less than or equal to the cut-in voltage of said diode.
7 more elements
Dependencies are inferred from the claim text.