Back to results
US 6,307,220 B1Granted
Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
Life of this patent
Estimating the term…
Abstract
To provide a semiconductor device having a new structure capable of simultaneously realizing high operational function and high reliability, in an activation region 102 sandwiched by a source region 101 and a drain region 103 constituted by a crystalline semiconductor, SixGe1−x regions 105 are formed by locally adding germanium and a depletion layer widening from the drain side toward the source side is effectively restrained by utilizing a difference in band structures of the SixGe1−x regions 105 and Si regions 106 where germanium is not added.
Claims75
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein the activation region comprises SixGe1−x (0<x<1) regions and Si regions;
- and
- a depletion layer widening from the drain region toward the source region is restrained by the SixGe1−x (0<x<1) regions,
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
1 more element
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein the activation region comprises SixGe1−x (0<x<1) regions and Si regions;
- and
- a depletion layer widening from the drain region toward the source region is restrained by the Si regions,
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
1 more element
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein the activation region comprises SixGe1−x (0<x<1) regions provided and Si regions;
- and
- a depletion layer widening from the drain region toward the source region is restrained and a threshold voltage is controlled by the SixGe1−x (0<x<1) regions,
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
1 more element
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein the activation region comprises SixGe1−x (0<x<1) regions and Si regions;
- and
- a depletion layer widening from the drain region toward the source region is restrained and a threshold voltage is controlled by the Si regions,
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
1 more element
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein said activation region and a portion of said source or drain region comprise SixGe1−x (0<x<1) regions and Si regions, and
- a depletion layer widening from the drain region toward the source region is restrained by the SixGe1−x (0<x<1) regions,
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein said activation region and a portion of said source or drain region comprise SixGe1−x (0<x<1) regions and Si regions, and
- a depletion layer widening from the drain region toward the source region is restrained by the Si regions,
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
A semiconductor device comprising:
- a source region, a drain region and an activation region in a crystalline semiconductor, wherein the activation region comprises SixGe1−x (0<x<1) regions and Si regions, and
- wherein the SixGe1−x (0<x<1) regions and the Si regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
A semiconductor device comprising:
- a substrate having an insulating surface;
- a semiconductor film comprising silicon provided over said substrate;
- a source region, a drain region, and an activation region formed in said semiconductor film;
- and
- a plurality of germanium doped regions formed in said semiconductor film between said source and said drain region,
- wherein said plurality of germanium doped regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
3 more elements
A semiconductor device comprising:
- a single crystal semiconductor comprising silicon;
- a source region, a drain region, and an activation region formed in said single crystal semiconductor;
- a plurality of germanium doped regions formed in said single crystal semiconductor between said source and said drain regions,
- wherein said plurality of germanium doped regions are arranged along a width direction of said activation region and extend along a length direction of said activation region.
1 more element
Dependencies are inferred from the claim text.