Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
AssigneeTexas Instruments Incorporated
InventorsMark S. Rodder, Mahalingam Nandakumar
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Abstract
A transistor (30) and method for forming a transistor using an edge blocking material (24) is disclosed herein. The edge blocking material (24) may be located adjacent a gate (22) or disposable gate or may be part of a disposable gate. During an angled pocket implant, the edge blocking material (24) blocks some dopant from entering the semiconductor body (10) and the dopant (18) placed under the edge blocking material is located at a given distance below the surface of the semiconductor body (10).
Claims12
A method of fabricating a transistor, comprising the steps of:
- forming a gate dielectric over a semiconductor body;
- forming a gate electrode over said gate dielectric;
- forming an implant blocking spacer adjacent sidewalls of said gate electrode, wherein said implant blocking spacer comprises silicon nitride;
- forming a first doped region of a first conductivity type in said semiconductor body adjacent said implant blocking spacer;
- then, angle implanting a pocket region of a second conductivity type in said semiconductor body at least partially under said implant blocking spacer to form a pocket in said semiconductor body;
- forming a sidewall spacer adjacent said implant blocking spacer after said angle implanting step;
- and
- forming deep source/drain region in said semiconductor body aligned to said sidewall spacer.
A method of fabricating a transistor, comprising the steps of:
- forming a gate dielectric over a semiconductor body;
- forming a gate electrode over said gate dielectric;
- forming an implant blocking spacer adjacent sidewalls of said gate electrode, wherein said implant blocking spacer comprises silicon carbide;
- forming a first doped region of a first conductivity type in said semiconductor body adjacent said implant blocking spacer;
- then, angle implanting a pocket region of a second conductivity type in said semiconductor body at least partially under said implant blocking spacer to form a pocket in said semiconductor body;
- forming a sidewall spacer adjacent said implant blocking spacer after said angle implanting step;
- and
- forming deep source/drain region in said semiconductor body aligned to said sidewall spacer.
Dependencies are inferred from the claim text.