Method of fabricating an electronic package with interconnected chips

A method of making an electronic package, said method comprising:

• providing a circuitized substrate having a first cavity therein, said cavity passing completely through said substrate, and including a first surface and a second surface;
• positioning a plurality of electrically conductive members on said first surface of said circuitized substrate, at least some of said conductive members located about the periphery of said cavity;
• providing a thick planar heatsink having a second cavity, and bonding said heatsink to said second surface of said substrate with said second cavity overlapping at least partially said first cavity;
• positioning a first semiconductor chip substantially within said first and second cavities and thermally coupled to said planar heatsink;
• directly electrically coupling said first semiconductor chip to said at least some of said conductive members located about said periphery of said cavity;
• positioning a second semiconductor chip on said first semiconductor chip and having an external surface of said second semiconductor chip substantially coplanar with said first surface of said circuitized substrate;
• and
• electrically coupling said second semiconductor chip to said first semiconductor chip.