Method of making self-aligned, high-enegry implanted photodiode for solid-state image sensors

A method of making a self aligned high energy implanted photodiode defined by the steps of:

• providing a substrate of a first conductivity type with at least one well on a major surface of the substrate, the well being formed from a second conductivity type opposite the first conductivity type;
• defining a charge coupled device within the well such that a gate electrode layer and a gate dielectric layer exist over areas to contain photodiodes, and first etching the gate electrode during construction of the charge coupled device, and implanting a channel stop of the first conductivity type on one side of each of the areas to contain photodiodes such that the channel stop overlaps the photodiode area;
• the method further comprises the steps in the sequence set forth:
• (a) patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the areas of the photodiodes and at least a portion of the channel stop;
• second etching anisotropically down through the gate electrode layer over the photodiodes and the portion of the channel stop to the gate dielectric layer, and
• (c) implanting photodiodes with high-energy ions of the first conductivity type such that the photodiodes are self aligned with the input edge of the transfer gate and the photodiode overlaps the channel stop.

A method of making an implanted photodiode defined by the steps of:

• providing an imaging area on a semiconductor substrate of a first conductivity type with a plurality of photodetectors and a CCD with a plurality of cells adjacent to the photodetectors such that each of the photodetectors is adjacent one of the CCD cells;
• secondly providing a transfer gate on one side of the photodetector area and a channel stop formed of the first conductivity type on the opposite side of the photodetector, the photodetector area being defined such that a gate electrode layer and a gate dielectric layer exist over photodetector areas, and first etching the gate electrode area during formation of the CCD;
• the method further comprises the steps in the sequence set forth:
• (a) patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the photodetector areas and a portion of the channel stop;
• (b) anisotropically etching down through the gate electrode layer over the photodiode area and the portion of the channel stop while leaving the gate dielectric layer substantially intact;
• and
• (c) using a high energy implant to create a photodiode of a second conductivity type opposite the first conductivity type within the photodetector areas such that the photodiode is self aligned with at least one edge of the transfer gate, overlaps the channel stop.