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US 6,304,480 B1Granted
Read only memory integrated semiconductor device
AssigneeSTMicroelectronics S.r.l.
InventorJean-Pierre Schoellkopf
Life of this patent
Estimating the term…
Abstract
A read only memory integrated semiconductor device includes at least one memory cell. The memory cell includes a storage transistor made within a semiconductor substrate and whose source is connected to ground. A word line is connected to the gate of the transistor. Only one of several bit lines may be connected to the drain of the transistor at a time.
Claims27
An integrated read only memory device comprising:
- at least one memory cell comprising
- a semiconductor substrate,
- a storage transistor in said semiconductor substrate and having a first conduction terminal connected to a reference voltage,
- a word line connected to a control terminal of said storage transistor, and
- a plurality of auxiliary bit lines for connection to a second conduction terminal of said storage transistor, at most one of said plurality of auxiliary bit lines being connected to the second conduction terminal of said storage transistor at a time.
2 more elements
An integrated read only memory device comprising:
- at least one memory cell comprising
- a semiconductor substrate,
- a storage transistor in said semiconductor substrate and having a first conduction terminal connected to a reference voltage,
- a word line connected to a control terminal of said storage transistor,
- a plurality of auxiliary bit lines, situated one above another on respective metallization levels above the semiconductor substrate, for connection to a second conduction terminal of said storage transistor, at most one of said plurality of auxiliary bit lines being connected to the second conduction terminal of said storage transistor at a time, and
- a pillar connecting the second conduction terminal of said storage transistor to each of the metallization levels.
3 more elements
An integrated read only memory device comprising:
- at least one memory cell comprising
- a semiconductor substrate,
- a storage transistor in said semiconductor substrate and having a first conduction terminal connected to a reference voltage,
- a word line connected to a control terminal of said storage transistor, and
- a plurality of auxiliary bit lines, each alongside one another on a predetermined metallization level, for connection to a second conduction terminal of said storage transistor, at most one of said plurality of auxiliary bit lines being connected to the second conduction terminal of said storage transistor at a time,
- a connection line situated at an intermediate metallization level between said semiconductor substrate and the predetermined metallization level, and
- a pillar having a first end connected to the second conduction terminal of said storage transistor and a second end connected to said connection line.
4 more elements
A integrated read only memory device comprising:
- a memory block comprising
- a main memory cell comprising a semiconductor substrate, a storage transistor in said semiconductor substrate and having a first conduction terminal connected to a reference voltage, a word line connected to a control terminal of said storage transistor, and at least three auxiliary bit lines for connection to a second conduction terminal of said storage transistor, at most one of the at least three auxiliary bit lines being connected to the second conduction terminal of said storage transistor at a time;
- and
- a plurality of ancillary memory cells each comprising an ancillary storage transistor connected to the word line of said main memory cell and an ancillary bit line for connection to a conduction terminal of said ancillary storage transistor.
1 more element
Dependencies are inferred from the claim text.