Semiconductor package having stacked dice and leadframes and method of fabrication

A semiconductor package comprising:

• a first leadframe segment comprising a plurality of first leads having first tip portions;
• a first semiconductor die having a first face attached to the first leads and a plurality of first bond pads on the first face;
• a second leadframe segment comprising a plurality of second leads having second tip portions staggered with respect to the first tip portions to provide a plurality of spaces;
• a plurality of conductive adhesive layers attaching and electrically connecting the first leads to the second leads;
• a second semiconductor die having a second face attached to the second leads and a plurality of second bond pads on the second face;
• a plurality of first wires in the spaces bonded to the first bonds pads and to the first tip portions, and a plurality of second wires in the spaces bonded to the second bond pads and to the second tip portions;
• a plastic body at least partially encapsulating the first semiconductor die and the second semiconductor die;
• and
• a plurality of terminal leads extending from the plastic body comprising portions of the first leads.

A semiconductor package comprising:

• a first semiconductor die;
• a plurality of first leads attached to the first die, the first leads comprising first leadfingers of a first lead-on-chip leadframe having first tip portions;
• a second semiconductor die;
• a plurality of second leads attached to the second die in physical and electrical contact with the first leads, the second leads comprising second leadfingers of a second lead-on-chip leadframe, the second leadfingers comprising second tip portions offset with respect to the first tip portions to provide a plurality of spaces for wire bonding;
• a metal layer on the first leads and on the second leads configured to attach and to provide an electrical path therebetween;
• a plurality of first wires in the spaces bonded to the first semiconductor die and to the first tip portions, and a plurality of second wires in the spaces bonded to the second semiconductor die and to the second tip portions;
• a plastic body at least partially encapsulating the first semiconductor die and the second semiconductor die;
• and
• a plurality of terminal leads extending from the plastic body comprising portions of the first leads.

A semiconductor package comprising:

• a first die;
• a plurality of first leadfingers comprising first tip portions having first sides thereof attached to the first die, opposing second sides thereof wire bonded to the first die, and first terminal portions thereof configured as terminal leads for the package;
• a second die;
• a plurality of second leadfingers comprising second tip portions having first sides thereof attached to the second die, opposing second sides thereof wire bonded to the second semiconductor die, and second terminal portions thereof in physical and electrical contact with the first terminal portions, the second tip portions staggered with respect to the first tip portions to provide a plurality of spaces for wire bonding the first die to the first leadfingers and the second die to the second leadfingers;
• and
• a plastic body at least partially encapsulating the first semiconductor die and the second semiconductor die.

A semiconductor package comprising:

• a first die comprising a first face and a plurality of first bond pads on the first face;
• a plurality of first leadfingers comprising first die mounting surfaces on first sides thereof attached to the first face, first wire bonding surfaces on opposing second sides thereof wire bonded to the first bond pads, and first terminal portions configured as terminal leads for the package;
• a second die comprising a second face and a plurality of second bond pads on the second face;
• a plurality of second leadfingers comprising second die mounting surfaces on first sides thereof attached to the second face, second wire bonding surfaces wire bonded to the second bond pads and staggered with respect to the first wire bonding surfaces to provide a plurality of spaces for wire bonding, and second terminal portions in physical and electrical contact with the first terminal portions;
• and
• a plastic body at least partially encapsulating the first semiconductor die and the second semiconductor die.

A semiconductor assembly comprising:

• a substrate comprising a plurality of electrodes;
• and
• a semiconductor package on the substrate comprising:
• a first leadframe segment comprising a plurality of first leads having first tip portions;
• a first semiconductor die attached and wire bonded to the first tip portions;
• a second leadframe segment comprising a plurality of second leads electrically connected to the first leads, the second leads comprising a plurality of second tip portions staggered with respect to the first tip portions to provide a plurality of spaces for wire bonding;
• a second semiconductor die attached and wire bonded to the second tip portions;
• a plastic body at least partially encapsulating the first semiconductor die and the second semiconductor die;
• and
• a plurality of terminal leads extending from the plastic body comprising portions of the first leads, the terminal leads in electrical contact with the electrodes.