US 6,300,928 B1 · Scanning circuit for driving liquid crystal display

Abstract

A scanning circuit that can minimize the number of input signals and switch signals applied to row lines of a liquid crystal panel, and reduce deterioration of a circuit is disclosed. The circuit includes input signal lines and a plurality of substantially identical stages cascade-connected to the input signal lines to produce a plurality of phase delayed scanning signals. Each stage has an input terminal and an output terminal. Also, each stage is provided with output circuitry comprising a push-pull amplifier including pull-up and pull-down transistors having respective conduction paths connected in series with the output terminal thereof and respective control electrodes, the push-pull amplifier having a supply terminal for applying one of the phase delayed scanning signals, input circuitry responsive to scanning pulse applied to the input terminal for generating first and second control signals which are coupled to the control electrodes of the pull-up and pull-down transistors for conditioning the push-pull amplifier to provide output scanning pulses, and means for raising a voltage of the first control signal to be applied to the control electrode of the pull-up transistor.

Claims26

Dependent claims

A scanning circuit comprising a plurality of cascaded scanning stages, each of the scanning stages having an input terminal and an output terminal, the scanning circuit including means for generating phase delayed scanning signals and means for receiving an input signal, the scanning stages comprising:

output circuitry comprising a push-pull amplifier including a pull-up transistor and a pull-down transistor having respective conduction paths connected in series with the output terminal, the pull-up transistor having a control electrode and the pull-down transistor having a control electrode, the push-pull amplifier having a supply terminal for receiving one of the phase delayed scanning signals;
input circuitry responsive to a scanning pulse applied to the input terminal for generating first and second control signals that are respectively coupled to the control electrodes of the pull-up transistor and a pull-down transistor for conditioning the push-pull amplifier to provide output scanning pulses;
and
means responsive to a signal at the output terminal for raising a voltage of the first control signal to be applied to the control electrode of the pull-up transistor.

1 more element

output circuitry comprising a push-pull amplifier including a pull-up transistor and a pull-down transistor having respective conduction paths connected in series with the output terminal and respective control electrodes, the push-pull amplifier having a supply terminal for receiving one of the phase delayed scanning signals;
input circuitry responsive to a scanning pulse applied to the input terminal for generating first and second control signals that are coupled to the control electrodes of the pull-up and pull-down transistors for conditioning the push-pull amplifier to provide output scanning pulses;
and
means for accelerating a tuming-off speed of the pull-down transistor by discharging a voltage at the control electrode of the pull-down transistor selectively in one of two paths.

1 more element

A scanning circuit comprising a plurality of cascaded scanning stages, each of said scanning stages having an input terminal and an output terminal, the scanning circuit including means for generating phase delayed scanning signals and means for receiving an input signal, the scanning stages comprising:

output circuitry comprising a push-pull amplifier including a pull-up transistor and a pull-down transistor having respective conduction paths connected in series with the output terminal and respective control electrodes, the push-pull amplifier having a supply terminal for receiving one of the phase delayed scanning signals;
input circuitry responsive to a scanning pulse applied to the input terminal for generating first and second control signals that are coupled to the control electrodes of the pull-up and pull-down transistors for conditioning the push-pull amplifier to provide output scanning pulses;
and
means for supplementing a potential to the control electrode of the pull-down transistor during a time interval at which the pull-up transistor is turned off.

1 more element

Dependencies are inferred from the claim text.

Scanning circuit for driving liquid crystal display

Life of this patent

Scanning circuit for driving liquid crystal display

Life of this patent

Abstract

Claims26