High resistance integrated circuit resistor
AssigneeMicron Technology, Inc.
InventorsJames E. Miller, Jr., Manny K. F. Ma
Life of this patent
Estimating the term…
Abstract
The present invention teaches fabrication of a high-resistance integrated circuit diffusion resistor that uses standard CMOS process steps. By appropriate masking during ion-implantation of source/drain diffusion regions, diffusion resistors created during NMOS source/drain implant may be counterdoped during PMOS source/drain implants and vice-versa. By appropriate choice of relative concentrations of a resistor dopant and counterdopant, and choice of diffusion depths, junction diodes can be formed which create a pinched resistor by constricting the current flow. The relative dopant concentrations can also be chosen to create regions of light effective doping within the diffusion resistor rather than creating junction diodes.
Claims39
A integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define an area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define an area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate and is approximately equal to the depth D1;
- L1 and L2 are substantially parallel to each other;
- and
- the area defined by L2 and W2 at least partially intersects the area defined by L1 and W1.
An integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define a first cross sectional area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define a second cross sectional area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the first cross sectional area at least partially intersects the second cross sectional area and the first cross sectional area exceeds the second cross sectional area.
An integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define a first cross sectional area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define a second cross sectional area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the first cross sectional area least partially intersects the second cross sectional area and the second cross -sectional area exceeds the first cross-sectional area.
An integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define a first cross sectional area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define a second cross sectional area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the first cross sectional area at least partially intersects the second cross sectional area and the first and second cross-sectional areas are approximately equal.
An integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W2 define an area substantially parallel to the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define an area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate and wherein the depth D1 is about equal to or exceeds the depth D2;
- L1 and L2 are substantially parallel to each other;
- and
- the area defined by L2 and W2 at least partially intersects the area defined by L1 and W1.
A integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define an area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define an area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate and the depth D2 is about equal to or exceeds the depth D1;
- L1 and L2 are substantially parallel to each other;
- and
- the area defined by L2 and W2 at least partially intersects the area defined by L1 and W1.
A integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1, and W1 define a first cross-sectional area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define a second cross-sectional area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the first cross-sectional area at least partially intersects the second cross-sectional area and the first cross sectional area is about equal to or exceeds the second cross-sectional area.
An integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define a first cross-sectional area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define a second cross sectional area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the first cross-sectional area at least partially intersects the second cross-sectional and the second cross-sectional area is about equal to or exceeds the first cross-sectional area.
A integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define an area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define an area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the area defined by L2 and W2 at least partially intersects the area defined by L1 and W1.
A integrated circuit resistor fabricated in a substrate having a surface, the resistor comprising:
- a contiguous first conductivity type region formed in the substrate, wherein the first conductivity type region has a dopant depth that is approximately equal to a dopant depth of a first conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L1, a width W1, and a depth D1, and in which L1 and W1 define an area substantially parallel to the surface of the semiconductor substrate, and D1 extends substantially orthogonally to each of L1 and W1 into the substrate;
- at least two electrical contacts to the first conductivity type region for allowing current flow between the contacts through the first conductivity type region;
- and
- at least one second conductivity type region formed in the substrate such that the second conductivity type region at least partially intersects the first conductivity type region for increasing resistance to the current flow between the contacts, wherein the second conductivity type region has a dopant depth that is approximately equal to a dopant depth of a second conductivity type transistor source/drain region formed elsewhere in the substrate and also has a length L2, a width W2, and a depth D2, and in which L2 and W2 define an area substantially parallel the surface of the semiconductor substrate, and D2 extends substantially orthogonally to each of L2 and W2 into the substrate;
- L1 and L2 are substantially parallel to each other;
- and
- the area defined by L2 and W2 at least partially intersects the area defined by L1 and W1.
Dependencies are inferred from the claim text.