An operational amplifier design system to design an operational amplifier having a first amplifier stage, a second amplifier stage and a minimum total harmonic distortion, comprising:
- a receiving and storing means to receive and retain a tail current of a differential pair of transistors of the first amplifier stage, a slew rate of said operational amplifier, a load resistance, and a load capacitance of said operational amplifier;
- a gain estimating means to estimate a gain level of the second amplifier stage of the operational amplifier;
- a first transconductance calculating means coupled to the receiving and storing means and the gain estimating means to calculate a transconductance of the second amplifier stage of the operational amplifier as a function of the load resistance and the gain level of the second amplifier stage;
- a unity gain frequency calculating means coupled to the receiving and storing means to calculate a unity gain frequency for the first amplifier stage as a function of the load resistance and the load capacitance;
- a first gain calculating means connected to the unity gain frequency calculating means to calculate a one kilohertz gain level of the first amplifier stage as a function of the unity gain frequency of the first amplifier stage;
- a second gain calculating means connected to the gain estimating means and the first gain calculating means to calculate the overall to calculate the one kilohertz gain level of the operational amplifier;
- a unity gain frequency calculating means connected to the second gain calculating means to calculate a unity gain frequency for said operational amplifier as a function of the overall one kilohertz gain level;
- a compensation capacitance calculating means connected to the receiving and storing means to calculate a value of a compensation capacitance for said operational amplifier as a function of said tail current and said slew rate;
- a second transconductance calculating means connected to the compensation capacitance calculating means and the unity gain frequency calculating means to calculate a transconductance of the first amplifier stage of the operational amplifier as a function of the value of the compensation capacitance and the unity gain frequency;
- an overall D.C. gain level determining means connected to second gain calculating means to determine an overall D.C. gain level as a function of the one kilohertz gain level;
- an output resistance determining means connected to the overall D.C. gain level determining means, the gain estimating means, and the second transconductance calculating means to calculate an output resistance of the first amplifier stage of the operational amplifier as a function of the overall D.C. gain level, the gain level of the second amplifier stage of the operational amplifier, and the transconductance of the first amplifier stage of the operational amplifier;
- a circuit synthesizing means connected to the receiving and storing means, the first transconductance calculating means, the second transconductance calculating means, the output resistance determining means, and the compensation capacitance calculating means to synthesize transistor sizes and bias currents for said operational amplifier;
- a simulating means connected to said circuit synthesizing means to simulate the transistor sizes and bias currents of said operational amplifier to determine stability, total harmonic distortion (THD), cell area, and power consumption to insure an optimum design and connected to the gain estimating means to increase the estimate of the gain level of the second amplifier if the operational amplifier is not an optimized design, and
- a circuit fabricating means to fabricate said operational amplifier when said operational amplifier is an optimum design.