# US 6,295,228 B1 · System for programming memory cells

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- Number: US 6,295,228 B1
- Document ID: US6295228B1
- Status: Granted
- Kind: B1
- Application number: 09/514,933
- Filed: 2000-02-28
- Granted: 2001-09-25
- Earliest claimed: 2000-02-28
- Assignees: Advanced Micro Devices, Inc.
- Inventors: Joseph G. Pawletko; Binh Quang Le; Pau-Ling Chen; James M. Hong
- Web page: https://patentgrep.com/patent/US6295228B1

## CPC

- G11C 29/028: {with adaption or trimming of parameters}
- G11C 16/10: Programming or data input circuits
- G11C 16/30: Power supply circuits
- G11C 29/50: Marginal testing, e.g. race, voltage or current testing
- G11C 16/04: using variable threshold transistors, e.g. FAMOS
- G11C 2029/5004: {Voltage}
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A programming control circuit programs a memory cell in accordance to a programming signal value that can be varied by a test equipment. The programming control circuit comprises a signal storage device, a signal output circuit, and a verification circuit. The signal storage device stores the programming signal value. The test equipment can be coupled to the signal storage device to write the programming signal value into the signal storage device. The signal output circuit is coupled to the signal storage device to receive the programming signal value. The signal output circuit converts the programming signal value into a programming signal and outputs the programming signal to the memory cell. The verification circuit determines whether the memory cell is successfully programmed. If the memory cell is not successfully programmed, the programming control circuit increases the programming signal value.

## Claims

### Claim 1

A programming control circuit that programs a memory cell, the control circuit comprising:
a plurality of memory cells that stores a programming signal value;
a signal output circuit that is coupled to receive the programming signal value from the plurality of memory cells and that converts the programming signal value into a programming signal and outputs the programming signal to the memory cell; and
a verification circuit, the verification circuit determining whether the memory cell successfully programmed, wherein when the memory cell did not successfully program, the signal output circuit increases the programming signal value.

### Claim 2 (depends on 1)

The circuit of claim 1, wherein the signal output circuit converts the increased programming signal value into an increased programming signal and outputs the increased programming signal to the memory cell.

### Claim 3 (depends on 1)

The circuit of claim 1, wherein the signal output circuit includes a counter circuit, the counter circuit storing the programming signal value.

### Claim 4 (depends on 3)

The circuit of claim 3, wherein the plurality of memory cells is coupled to a test equipment and the test equipment stores the programming signal value into the plurality of memory cells.

### Claim 5 (depends on 3)

The circuit of claim 3, wherein the counter circuit selectively increases the programming signal value.

### Claim 6 (depends on 1)

The circuit of claim 1, wherein the signal output circuit increases the programming signal value in a non-linear order.

### Claim 7 (depends on 1)

The circuit of claim 1, wherein the signal output circuit increases the programming signal value by a decreasing increment.

### Claim 8 (depends on 1)

The circuit of claim 1, wherein the signal output circuit comprises:
an output terminal that provides the programming signal;
a first impedance element coupled to the output terminal;
a second impedance element coupled to the first impedance element, wherein the level of impedance of the second impedance element is controlled by the programming signal value; and
a comparator coupled to the first impedance element and the second impedance element, wherein the comparator controls the output terminal to provide the programming signal.

### Claim 9

A method for programming a memory cell, the method comprising the acts of:
storing a program signal value in a plurality of memory cells;
loading the program signal value into a counter circuit;
converting the program signal value in the counter circuit into a program signal;
applying the program signal to the memory cell;
verifying the programming of the memory cell; and
if the memory cell has not successfully programmed, increasing the program signal value in the counter circuit.

### Claim 10 (depends on 9)

The method of claim 9, further comprising the acts of
converting the increased program signal value into an increased program signal;
applying the increased program signal to the memory cell; and
verifying the programming of the selected memory cell.

### Claim 11 (depends on 10)

The method of claim 10, wherein the act of increasing further comprises increasing the program signal value in a non-linear order.