# US 6,294,910 B1 · Digital position sensor for sensing position of a moving target

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- Number: US 6,294,910 B1
- Document ID: US6294910B1
- Status: Granted
- Kind: B1
- Application number: 09/161,085
- Filed: 1998-09-25
- Granted: 2001-09-25
- Earliest claimed: 1997-09-26
- Assignees: The Torrington Company
- Inventors: Francis Travostino; Alain Bochet
- Web page: https://patentgrep.com/patent/US6294910B1

## CPC

- H03M 1/0619: {by dividing out the errors, i.e. using a ratiometric arrangement}
- G01D 5/24404: {Interpolation using high frequency signals}
- H03M 1/203: {using an analogue interpolation circuit}
- H03M 1/303: {Circuits or methods for processing the quadrature signals}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- G01D: MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR

## Abstract

A moving target opposite a stationary analog sensor has two sensitive elements delivering two sinusoidal output signals, of equal maximum amplitudes, centered on the same average value, in quadrature and with a period equal to one revolution of the target. A device for processing the two output signals, generates n output signals in-parallel, where n is a positive whole number greater than or equal to 2, for providing the position of a rotating component, connected to the moving target, with a resolution equal to 2n. The processing device includes a generator device, a detection device, a multiplexing device and an interpolation device.

## Claims

### Claim 1

A digital position sensor for sensing position of a moving target, the digital position sensor comprising:
a stationary analog sensor composed of two sensitive elements for delivering two sinusoidal output signals (S1 and S2), of equal maximum amplitudes (A0), centered on the same average value (C0), in quadrature and with a period equal to one revolution of the target; and
a device for processing the two output signals (S1 and S2) generating n digital output signals in parallel, where n is a positive whole number greater than or equal to 2, for providing the position of a rotating component connected to the moving target, with a resolution equal to 2n, wherein the processing device includes:
generation means (1) for generation, from the two input signals (S1 and S2), of 2m−1 signals (Si), where (i) is a positive whole number varying from 1 to 2m−1, of the same amplitude (A0), centered on the same average value (C0) and successively phase shifted by 2π/2m−1 with respect to one another, where m is a positive whole number less than or equal to n;
detection means (2) for detection of 2m sectors (Pi) delimited by the 2m−1 signals (Si), delivering m digital signals (bn−m+1, bn−m+2, . . . , bn−1, bn) which correspond to the high order bits of the digital output signal of the sensor and which are encoded in such a way as to define the 2m identical sectors (Pi);
multiplexing means (3) for analog multiplexing the 2m−1 signals (Si) delivered by the generating means (1), controlled by the m digital signals (bn−m+1, bn) coming from the detection means (2), and delivering two signals (A and B), one of which (A) is made up of the sequence of the portions of the 2m−1 signals (Si) whose amplitude is between the centering value (C0) and a first threshold (L1), and the other of which (B) is made up of the sequence of the portions of the 2m−1 signals (Si) whose amplitude is between the first threshold (L1) and a second threshold (L2) higher than (L1); and
interpolation means (4) for fine interpolation of the two signals (A and B) coming from the multiplexing means (3), in each of the 2m sectors (Pi), in order to generate (n−m) digital signals (b1, b2, . . . bn−m−1, bn−m) which correspond to the low order bits of the signal and which are encoded in such a way as to divide each of the 2m sectors (Pi) with angle 2π/2m into 2n−m identical subsectors with angle 2π/2n in order to obtain the desired resolution, all of the digital output signals (b1, . . . , bn−m, bn−m+1, . . . , bn) of the position sensor being representative of the absolute position of the rotating component.

### Claim 2

A digital position sensor for sensing position of a moving target, the digital position sensor comprising:
a stationary analog sensor composed of two sensitive elements for delivering two sinusoidal output signals (S1 and S2), of equal maximum amplitudes (A0), centered on the same average value (C0), in quadrature and with period equal to 2kπ revolution of the target, where k is a positive whole number greater than or equal to 2; and
a device for processing of the two output signals (S1 and S2) generating n digital output signals in parallel, where n is a positive whole number greater than or equal to 2, for providing the position of a rotating component connected with the moving target, with a resolution equal to 2n, wherein the processing device includes:
generation means (1) for generation, from the two input signals (S1 and S2), of a number of signals (Si) equal to 2m−1, where i is a positive whole number varying from 1 to 2m−1, of the same amplitude (A0), centered on the same average value (C0) and successively phase shifted by 2π/2m−1 with respect to one another, where m is a positive whole number less than or equal to n;
detection means (2) for detection of 2m sectors (Pi) delimited by the 2m−1 signals (Si), delivering m digital signals (bn−m+1, bn−m+2, . . . , bn−1, bn) which correspond to the high order bits of the digital output signal of the sensor and which are encoded in such a way as to define the 2m identical sectors (Pi);
multiplexing means (3) for analog multiplexing of the 2m−1 signals (Si) delivered by the generating means (1), controlled by the m digital signals (bn−m+1, bn) coming from the detection means (2), and delivering two signals (A and B), one of which (A) is made up of the sequence of the portions of the 2m−1 signals (Si) whose amplitude is between the centering value (C0) and a first threshold (L1), and the other of which (B) is made up of the sequence of the portions of the 2m−1 signals (Si) whose amplitude is between the first threshold (L1) and a second threshold (L2) higher than the first (L1); and
interpolation means (4) for fine interpolation of the two signals (A and B) coming from the multiplexing means (3), in each of the 2m sectors (Pi), in order to generate (n−m) digital signals (b1, b2, . . . bn−m−1, bn−m) which correspond to the low order bits of the digital output signal and which are encoded in such a way as to divide each of the 2m sectors (Pi) with angle 2π/2m into 2n−m identical subsectors with angle 2π/2n in order to obtain the desired resolution, all of the digital output signals (b1, . . . , bn−m, bn−m+1, . . . , bn) of the position sensor being representative of the absolute position of the rotating component.

### Claim 3 (depends on 1)

A digital position sensor according to claim 1, wherein the multiplexing means (3) generates the signals (A and B) from thresholds (L1) and (L2) of determined values:
L1=A0 sin(2π/2m)
L2=A0 sin(2π/2m−1).

### Claim 4 (depends on 3)

A digital position sensor according to claim 3, wherein the multiplexing means (3) includes 2m combinations of logic circuits, such as NOT and AND gates.

### Claim 5 (depends on 1)

A digital position sensor according to claim 1, wherein the interpolation means (4) generates signals (Bj), where j is a whole number varying from 1 to (2n−m−1), which are attenuations of the signal (B) by attenuation factors (kj), with values equal to:
kj=−sin(j*2π/2n)/sin(j*2π/2n−2π/2m−1)
compares each signal (Bj) with the signal (A), then executes logical combinations of the digital signals coming from these comparisons, in order to deliver the (n−n) digital output signals (b1, b2, . . . bn−m−1, bn−m) corresponding to the low order bits of the signal.

### Claim 6 (depends on 1, 2, 5, 6, 8, 9, 10, 16, 18, 19)

A digital position sensor according to claim 1, for providing the position of a rotating component with a resolution equal to 29, wherein the generation means (1) for generation of the signals (Si) of the processing device generates 2m−1=8 signals (S1 to S8), phase shifted by 45E with respect to one another, having the values: S 7 = - S 1 S 5 = - S 2 S 3 = S 1 + S 2 2 S 6 - = - S 3 S 4 = S 1 - S 2 2 S 8 = - S 4 which are obtained from summing circuits (7), NOT circuits (8) and amplifiers (9). 7. A digital position sensor according to claim 6, wherein the detection means (2) for detection of the 2m=16 sectors (Pi) includes four combinations (C6 to C9) of comparators (10) and of logic gates (11) of the AND and OR type, delivering the following digital signals: b9=1 if S70, b8=1 if S50, B7=1 if (S30 and S40) or (S60 and S80), b6=1 if (S1S8 and S2S4) or (S5S3 and S1S6) or (S7S4 and S5S8) or (S2S6 and S7S3). 8. A digital position sensor according to claim 1, wherein the processing device further comprises: generation means (7) for generating a digital output signal (bQUAD) I in quadrature with the digital output signal (b1) corresponding to the lowest order bit of the output signal of the digital position sensor and with the same resolution; generation means (8) for generating a reference pulse (bTT), where said digital signals (b1), (bQUAD) and (bTT) give the relative position of the rotating component. 9. A digital position sensor according to claim 8, wherein the generation means (7) for generating a digital output signal (bQUAD) performs the following Boolean operation by means of the Exclusive-OR (XOR) logical operator: bQUAD=b2 or b3 or . . . or bn−1 or bn. 10. A digital position sensor according to claim 8, wherein the generation means (8) for generating a reference pulse (bTT) performs the following Boolean operation: bTT=b1 and b2 and . . . and bn−1 and bn. 11. A digital position sensor according to claim 9, wherein the generation means (7) for generating a digital output signal (bQUAD) consists of an Exclusive-OR logic circuit receiving as input the digital output signals (b2 to bn), with the exception of the signal (b1) corresponding to the lowest order bit of the output signal of the digital position sensor, and by the fact that the means (8) for generating a reference pulse (bTT) consists of several AND and NOT logic gates. 12. A digital position sensor according to claim 10, wherein the generation means (7) for generating a digital output signal (bQUAD) consists of an Exclusive-OR logic circuit receiving as input the digital output signals (b2 to bn), with the exception of the signal (b1) corresponding to the lowest order bit of the output signal of the digital position sensor, and by the fact that the means (8) for generating a reference pulse (bTT) consists of several AND and NOT logic gates. 13. A digital position sensor according to claim 5, wherein the interpolation means (4) includes resistive networks attenuating the signal (B). 14. A digital position sensor according to claim 1, wherein the n digital output signals (bi) are serialized by means of a data transmission protocol integrated in the processing device. 15. A digital position sensor according to claim 1, wherein the coding of the n digital output signals (b1 to bn) makes it possible to define unambiguously the absolute position of the sensor. 16. A digital position sensor according to claim 2, wherein the multiplexing means (3) generates the signals (A and B) from thresholds (L1) and (L2) of determined values: L1=A0 sin(2π/2m) L2=A0 sin(2π/2m−1). 17. A digital position sensor according to claim 16, wherein the multiplexing means (3) includes 2m combinations of logic circuits, such as NOT and AND gates. 18. A digital position sensor according to claim 2, wherein the interpolation means (4) generates signals (Bj), where j is a whole number varying from 1 to (2n−m−1), which are attenuations of the signal (B) by attenuation factors (kj), with values equal to: Kj=−sin(j*2π/2n)/sin(j*2π/2n−2π/2m−1) compares each signal (Bj) with the signal (A), then executes logical combinations of the digital signals coming from these comparisons, in order to deliver the (n−n) digital output signals (b1, b2, . . . bn−m−1, bn−m) corresponding to the low order bits of the signal. 19. A digital position sensor according to claim 2, for providing the position of a rotating component with a resolution equal to 29, wherein the generation means (1) for generation of the signals (Si) of the processing device generates 2m−1=8 signals (S1 to S8), phase shifted by 45E with respect to one another, having the values: S 7 = - S 1 S 5 = - S 2 S 3 = S 1 + S 2 2 S 6 - = - S 3 S 4 = S 1 - S 2 2 S 8 = - S 4 which are obtained from summing circuits (7), NOT circuits (8) amplifiers (9). 20. A digital position sensor according to claim 19, wherein the detection means (2) for detection of the 2m=16 sectors (Pi) includes four combinations (C6 to C9) of comparators (10) and of logic gates (11) of the AND and OR type, delivering the following digital signals: b9=1 if S70, b8=1 if S50, B7=1 if (S30 and S40) or (S60 and S80), b6=1 if (S1S8 and S2S4) or (S5S3 and S1S6) or (S7S4 and S5S8) or (S2S6 and S7S3). 21. A digital position sensor according to claim 18, wherein the interpolation means (4) includes resistive networks attenuating the signal (B). 22. A digital position sensor according to claim 2, wherein the n digital output signals (bi) are serialized by means of a data transmission protocol integrated in the processing device. 23. A digital position sensor according to claim 2, wherein the coding of the n digital output signals (b1 to bn) makes it possible to define unambiguously the absolute position of the sensor.

### Claim 7 (depends on 6)

A digital position sensor according to claim 6, wherein the detection means (2) for detection of the 2m=16 sectors (Pi) includes four combinations (C6 to C9) of comparators (10) and of logic gates (11) of the AND and OR type, delivering the following digital signals:
b9=1 if S70,
b8=1 if S50,
B7=1 if (S30 and S40) or (S60 and S80),
b6=1 if (S1S8 and S2S4) or (S5S3 and S1S6)
or (S7S4 and S5S8) or (S2S6 and S7S3).

### Claim 8 (depends on 1)

A digital position sensor according to claim 1, wherein the processing device further comprises:
generation means (7) for generating a digital output signal (bQUAD) I in quadrature with the digital output signal (b1) corresponding to the lowest order bit of the output signal of the digital position sensor and with the same resolution;
generation means (8) for generating a reference pulse (bTT), where said digital signals (b1), (bQUAD) and (bTT) give the relative position of the rotating component.

### Claim 9 (depends on 8)

A digital position sensor according to claim 8, wherein the generation means (7) for generating a digital output signal (bQUAD) performs the following Boolean operation by means of the Exclusive-OR (XOR) logical operator:
bQUAD=b2 or b3 or . . . or bn−1 or bn.

### Claim 10 (depends on 8)

A digital position sensor according to claim 8, wherein the generation means (8) for generating a reference pulse (bTT) performs the following Boolean operation:
bTT=b1 and b2 and . . . and bn−1 and bn.

### Claim 11 (depends on 9)

A digital position sensor according to claim 9, wherein the generation means (7) for generating a digital output signal (bQUAD) consists of an Exclusive-OR logic circuit receiving as input the digital output signals (b2 to bn), with the exception of the signal (b1) corresponding to the lowest order bit of the output signal of the digital position sensor, and by the fact that the means (8) for generating a reference pulse (bTT) consists of several AND and NOT logic gates.

### Claim 12 (depends on 10)

A digital position sensor according to claim 10, wherein the generation means (7) for generating a digital output signal (bQUAD) consists of an Exclusive-OR logic circuit receiving as input the digital output signals (b2 to bn), with the exception of the signal (b1) corresponding to the lowest order bit of the output signal of the digital position sensor, and by the fact that the means (8) for generating a reference pulse (bTT) consists of several AND and NOT logic gates.

### Claim 13 (depends on 5)

A digital position sensor according to claim 5, wherein the interpolation means (4) includes resistive networks attenuating the signal (B).

### Claim 14 (depends on 1)

A digital position sensor according to claim 1, wherein the n digital output signals (bi) are serialized by means of a data transmission protocol integrated in the processing device.

### Claim 15 (depends on 1)

A digital position sensor according to claim 1, wherein the coding of the n digital output signals (b1 to bn) makes it possible to define unambiguously the absolute position of the sensor.

### Claim 16 (depends on 2)

A digital position sensor according to claim 2, wherein the multiplexing means (3) generates the signals (A and B) from thresholds (L1) and (L2) of determined values:
L1=A0 sin(2π/2m)
L2=A0 sin(2π/2m−1).

### Claim 17 (depends on 16)

A digital position sensor according to claim 16, wherein the multiplexing means (3) includes 2m combinations of logic circuits, such as NOT and AND gates.

### Claim 18 (depends on 2)

A digital position sensor according to claim 2, wherein the interpolation means (4) generates signals (Bj), where j is a whole number varying from 1 to (2n−m−1), which are attenuations of the signal (B) by attenuation factors (kj), with values equal to:
Kj=−sin(j*2π/2n)/sin(j*2π/2n−2π/2m−1)
compares each signal (Bj) with the signal (A), then executes logical combinations of the digital signals coming from these comparisons, in order to deliver the (n−n) digital output signals (b1, b2, . . . bn−m−1, bn−m) corresponding to the low order bits of the signal.

### Claim 19 (depends on 2, 18, 19)

A digital position sensor according to claim 2, for providing the position of a rotating component with a resolution equal to 29, wherein the generation means (1) for generation of the signals (Si) of the processing device generates 2m−1=8 signals (S1 to S8), phase shifted by 45E with respect to one another, having the values: S 7 = - S 1 S 5 = - S 2 S 3 = S 1 + S 2 2 S 6 - = - S 3 S 4 = S 1 - S 2 2 S 8 = - S 4 which are obtained from summing circuits (7), NOT circuits (8) amplifiers (9). 20. A digital position sensor according to claim 19, wherein the detection means (2) for detection of the 2m=16 sectors (Pi) includes four combinations (C6 to C9) of comparators (10) and of logic gates (11) of the AND and OR type, delivering the following digital signals: b9=1 if S70, b8=1 if S50, B7=1 if (S30 and S40) or (S60 and S80), b6=1 if (S1S8 and S2S4) or (S5S3 and S1S6) or (S7S4 and S5S8) or (S2S6 and S7S3). 21. A digital position sensor according to claim 18, wherein the interpolation means (4) includes resistive networks attenuating the signal (B). 22. A digital position sensor according to claim 2, wherein the n digital output signals (bi) are serialized by means of a data transmission protocol integrated in the processing device. 23. A digital position sensor according to claim 2, wherein the coding of the n digital output signals (b1 to bn) makes it possible to define unambiguously the absolute position of the sensor.

### Claim 20 (depends on 19)

A digital position sensor according to claim 19, wherein the detection means (2) for detection of the 2m=16 sectors (Pi) includes four combinations (C6 to C9) of comparators (10) and of logic gates (11) of the AND and OR type, delivering the following digital signals:
b9=1 if S70,
b8=1 if S50,
B7=1 if (S30 and S40) or (S60 and S80),
b6=1 if (S1S8 and S2S4) or (S5S3 and S1S6)
or (S7S4 and S5S8) or (S2S6 and S7S3).

### Claim 21 (depends on 18)

A digital position sensor according to claim 18, wherein the interpolation means (4) includes resistive networks attenuating the signal (B).

### Claim 22 (depends on 2)

A digital position sensor according to claim 2, wherein the n digital output signals (bi) are serialized by means of a data transmission protocol integrated in the processing device.

### Claim 23 (depends on 2)

A digital position sensor according to claim 2, wherein the coding of the n digital output signals (b1 to bn) makes it possible to define unambiguously the absolute position of the sensor.
