High-performance multiple-media duplicating system

A multiple-media duplicating system for copying digital data from a master media in parallel to a number of copy media, the multiple-media duplicating system comprising:

• a system-bus;
• a random access memory (“RAM”), that is coupled to the system-bus, for storing both a disk-copy digital computer program and digital data;
• a microprocessor central processing unit (“CPU”), that is coupled to the system-bus, which retrieves the digital computer program from the RAM, and which executes the digital computer program for copying digital data in parallel to all the copy media;
• a master input/output (“I/O”) port having a system-bus interface that is coupled to the system-bus, and also having a master-device interface adapted for being coupled to a master device that includes the master media;
• a plurality of copy I/O ports, each copy I/O port respectively having a system-bus interface that is coupled to the system-bus, and also having a copy-device interface adapted for being coupled to one of a plurality of copy devices that respectively include the copy media;
• a first special I/O port having a system-bus interface that is coupled to the system-bus, and also having a multiple copy-media interface that is coupled in parallel to the copy-device interfaces of each of said copy I/O ports;
• when the master device and several copy devices are connected to the respective copy-device interfaces, execution of the digital computer program by said microprocessor CPU effects a transfer of digital data from the master media via said master I/O port, and of the digital data in parallel to all of the copy media via said first special I/O port;
• and
• a digital logic circuit that is coupled to the system-bus, to the master-device interface of said master I/O port, and to the multiple copy-media interface of said first special I/O port;
• execution of the digital computer program by said microprocessor CPU transmitting a command to said digital logic circuit via said system-bus which causes said digital logic circuit upon receiving the command from the microprocessor CPU to transmit, for an interval of time,, signals:
• to said microprocessor CPU which prevents conventional access to the copy devices by suspending execution of the digital computer program by said microprocessor CPU during the interval of time;
• and
• to the master-device interface of said master I/O port and to the multiple copy-media interface of said first special I/O port which effect, during the interval of time, the copying of digital data from the master media to the copy media;
• whereby digital data is copied from the master media in parallel and concurrently to all of the copy media without storing digital data into and fetching the digital data from the RAM.