Image distortion correction circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsHironobu Yasui, Akinori Heishi, Yoshinori Miyamoto, Akira Ishimori, Hiroaki Nishino
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsHironobu Yasui, Akinori Heishi, Yoshinori Miyamoto, Akira Ishimori, Hiroaki Nishino
Estimating the term…
An image distortion correction circuit is provided in which a horizontal deflection current (IH) flows through horizontal correction coils (L1, L2) and a vertical deflection current (IV) flows through either of vertical correction coils (L3, L4). The vertical correction coils (L3, L4) and the horizontal correction coils (L1, L2) are wound on the same core (4). A pair of magnets (2, 3) on opposite ends of the core (4) apply a biased magnetic field from the north pole toward the south pole. The anode of a diode (D1), the cathode of a diode (D2) and a first end of a resistor (R1) are connected to an intermediate terminal (P11) through which the vertical deflection current (IV) flows. A first end of the vertical correction coil (L3) is connected to the cathode of the diode (D1). A second end of the resistor (R1) and a terminal (P4) are connected to a second end of the vertical correction coil (L3). A first end of the vertical correction coil (L4) is connected to the terminal (P4), and a second end of the vertical correction coil (L4) is connected to the anode of the diode (D2). The image distortion correction circuit minimizes the degradation of vertical deflection sensitivity to perform an intermediate pin distortion correction.
An image distortion correction circuit comprising:
Dependencies are inferred from the claim text.