Method, device and microprocessor for performing an XOR clear without executing an XOR instruction

A method of executing a current instruction from a sequence of instructions in an instruction execution device, said instruction execution device comprising at least one register including a flags register, said flags register comprising one or more flags, and said sequence of instructions comprising at least one type of XOR instruction, said current instruction comprising an operation code and at least two operands, the method comprising the steps of:

• testing whether the operation code of the current instruction belongs to one type of XOR instruction;
• comparing whether the at least two operands of the current instruction are the same;
• and
• assigning predetermined values to at least one of said one or more flags when the operation code of the current instruction belongs to one type of XOR instruction and the at least two operands of the current instruction are the same, without performing an XOR operation of the at least two operands.

An instruction execution device for processing a current instruction from a sequence of instructions, said sequence of instructions comprising at least one type of XOR instruction, said current instruction comprising an operation code and at least two operands, and said instruction execution device comprising:

• an XOR checker for receiving said current instruction, said XOR checker determining whether the operation code of said current instruction belongs to one type of XOR instruction;
• an operand comparator for receiving said at least two operands of said current instruction, said operand comparator testing whether said at least two operands of said current instruction are the same;
• and
• a result generator, coupling with said XOR checker and operand comparator, wherein said result generator operates to assign the value of zero to each of the at least two operands when the operation code of the current instruction belongs to the at least one type of XOR instructions and the at least two operands of the current instruction are the same, without performing an XOR operation of the at least two operands.

An instruction execution device for processing a current instruction from a sequence of instructions, said sequence of instructions comprising at least one type of XOR instruction, said current instruction comprising an operation code and at least two operands, and said instruction execution device comprising:

• at least one register, including a flags register, said flags register comprising one or more flags;
• an XOR checker for receiving said current instruction, said XOR checker determining whether the operation code of said current instruction belongs to one type of XOR instruction;
• an operand comparator for receiving said at least two operands of said current instruction, said operand comparator testing whether said at least two operands of said current instruction are the same;
• and
• a result generator, coupling with said XOR checker and operand comparator, wherein said result generator operates to assign predetermined values to at least one of said one or more flags in said flags register when the operation code of the current instruction belongs to the at least one type of XOR instructions and the at least two operands of the current instruction are the same, without performing an XOR operation of the at least two operands.

A microprocessor, for processing a current instruction from a sequence of instructions, said sequence of instructions comprising at least one type of XOR instruction, each of said at least one type of XOR instruction comprising an operation code and at least two operands, and said instruction execution device comprising:

• an XOR checker for receiving said current instruction, said XOR checker determining by use of a plurality of logic gates whether the operation code of said current instruction belongs to one type of XOR instruction;
• an operand comparator for receiving said at least two operands of said current instruction, said operand comparator testing by use of a plurality of logic gates to determine whether said at least two operands of the current instruction are the same;
• and
• a result generator, coupling with said XOR checker and operand comparator, wherein said result generator operates to assign the value of zero to each of the at least two operands when the operation code of the current instruction belongs to the at least one type of XOR instruction and the at least two operands of the current instruction are the same by use of a plurality of logic gates, without performing an XOR operation.

A microprocessor, for processing a current instruction from a sequence of instructions, said sequence of instructions comprising at least one type of XOR instruction, each of said at least one type of XOR instruction comprising an operation code and at least two operands, and said instruction execution device comprising:

• at least one register, including a flags register, said flags register comprising one or more flags;
• an XOR checker for receiving said current instruction, said XOR checker determining by use of a plurality of logic gates whether the operation code of said current instruction belongs to one type of XOR instruction;
• an operand comparator for receiving said at least two operands of said current instruction, said operand comparator testing by use of a plurality of logic gates to determine whether said at least two operands of the current instruction are the same;
• and
• a result generator, coupling with said XOR checker and operand comparator, wherein said result generator operates to assign predetermined values to at least one of said one or more flags in said flags register when the operation code of the current instruction belongs to the at least one type of XOR instruction and the at least two operands of the current instruction are the same by use of a plurality of logic gates, without performing an XOR operation.

A method of executing a plurality of current instructions from a sequence of instructions in an instruction execution device, said sequence of instructions comprising at least one type of XOR instruction, said plurality of current instructions comprising a first current instruction and one or more subsequent current instructions, said first current instruction comprising an operation code and at least two operands, said subsequent current instruction having one or more operands dependent on the result of said first current instruction, the method comprising the steps of:

• testing whether the operation code of the first current instruction belongs to one type of XOR instruction;
• comparing whether the at least two operands of the first current instruction are the same;
• and
• setting each of the one or more operands of said subsequent current instructions which are dependent on the result of said first current instruction to the value of zero when the operation code of the first current instruction belongs to one type of XOR instruction and the at least two operands of the first current instruction are the same, without performing an XOR operation of the at least two operands of the first current instruction.

An instruction execution device for processing a plurality of current instructions from a sequence of instructions, said sequence of instructions comprising at least one type of XOR instruction, said plurality of current instructions comprising a first current instruction and one or more subsequent current instructions, said first current instruction comprising an operation code and at least two operands, said subsequent current instruction having one or more operands dependent on the result of said first current instruction, and said instruction execution device comprising:

• an XOR checker for receiving said first current instruction, said XOR checker determining whether the operation code of said first current instruction belongs to one type of XOR instruction;
• an operand comparator for receiving said at least two operands of said first current instruction, said operand comparator testing whether said at least two operands of said first current instruction are the same;
• and
• a result generator, coupling with said XOR checker and operand comparator, wherein said result generator operates to assign the value of zero to each of the one or more operands of said subsequent current instructions which are dependent on the result of said first current instruction when the operation code of the first current instruction belongs to the at least one type of XOR instructions and the at least two operands of the first current instruction are the same, without performing an XOR operation of the at least two operands of the first current instruction.

A method of executing a current instruction from a sequence of instructions in an instruction execution device, the sequence of instructions including at least one type of XOR instruction, the current instruction having an operation code and at least two operands, comprising:

• categorizing the operation code of the current instruction as one of
• the at least one type of XOR instruction, and
• a different instruction;
• comparing the at least two operands of the current instruction when the current instruction is categorized in the categorizing step as the at least one type of XOR instruction;
• setting at least one of the at least two operands to a value of zero when the current instruction is categorized in the categorizing step as the at least one type of XOR instruction and it is determined in the comparing step that the at least two operands are the same;
• and
• executing the current instruction when one of
• the current instruction is categorized in the categorizing step as a different instruction, and
• the two operands are determined to be different in the comparing step.

A method of executing a current instruction from a sequence of instructions in an instruction execution device having at least one register including a flags register having at least one flag, the sequence of instructions including at least one type of XOR instruction, and the current instruction having an operation code and at least two operands, comprising:

• categorizing the operation code of the current instruction as one of
• the at least one type of XOR instruction, and
• a different instruction;
• comparing the at least two operands of the current instruction when the current instruction is categorized in the categorizing step as the at least one type of XOR instruction;
• assigning predetermined values to at least one of the at least one flag of the flags register when the current instruction is categorized in the categorizing step as the at least one type of XOR instruction and it is determined in the comparing step that the at least two operands are the same;
• and
• executing the current instruction when one of
• the current instruction is categorized in the categorizing step as a different instruction, and
• the two operands are determined to be different in the comparing step.