Partially ordered cams used in ternary hierarchical address searching/sorting
AssigneeMusic Semiconductors, Inc.
InventorsDavid Feldmeier, Tyler Arnold
Life of this patent
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Abstract
An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system (e.g., Internet Protocol (IP), layer-3 switches and ATM switches using E.164 addressing) addresses for identifying the source and destination of each digital packet data.
Claims34
A method for maintaining a sorted CAM to enable longest matches in a single search cycle when hierarchical addresses are added to, or deleted from, the CAM in a communication system utilizing hierarchical addresses and associated address masks, said method comprising the steps of:
- (a) segmenting the CAM into blocks wherein each block corresponds to a single hierarchical mask and wherein said blocks are arranged in the CAM such that the highest hierarchical masks are located at the lowest CAM addresses and the lowest hierarchical masks are located at the highest CAM addresses;
- (b) storing hierarchical addresses according to said block having a corresponding hierarchical mask;
- and
- (c) tracking
- (1) the first address of each of said blocks (floor);
- (2) the next free address of each of said blocks (nxtfree);
- and
- (3) the size of each of said blocks.
A content addressable memory (CAM) of a communications system utilizing ternary hierarchical addressing and associated address masks, said CAM comprising:
- a plurality of address entries and associated address masks that are arranged in said CAM by mask number, with address entries having the highest mask number being located at address entry locations at the top of the CAM and address entries having the lowest mask number being located at address entry locations at the bottom of the CAM, said mask number being defined as the number of contiguous ones in an associated address mask;
- said CAM being a binary CAM;
- and
- said CAM further comprising binary-encoding ternary (BET) conversion means for converting each ternary value in said ternary hierarchical address into a corresponding BET value to form said address entries, said each ternary value being represented by first and second bits of said corresponding BET value as follows:
- 0ternary→01binary
- 1ternary→10binary
- Xternary→00binary,
- where X is defined as a “don't care” value, and wherein said first bit is stored in a first bit location in an upper portion of said address entry location and wherein said second bit is stored in a second bit location in a lower portion of said address entry location.
An apparatus for storing a plurality of address entries and associated address masks in a communication system utilizing ternary hierarchical addressing and associated address masks, said apparatus comprising:
- a binary CAM;
- a binary-encoded ternary (BET) conversion means coupled to said binary CAM wherein said BET conversion means converts each ternary value into a corresponding BET value to form said address entries;
- and
- wherein said plurality of address entries and associated address masks are arranged in said binary CAM by mask number, with address entries having the highest mask number being located at address entry locations at the top of the CAM and address entries having the lowest mask number being located at address entry locations at the bottom of the CAM, said mask number being defined as the number of contiguous ones in an associated address mask;
- and
- wherein said BET conversion means generates a BET value comprising a first bit and a second bit for every ternary value of the ternary hierarchical address as follows:
- 0ternary→01binary
- 1ternary→10binary
- Xternary→00binary,
- where X is defined as a “don't care” value, and wherein said first bit is stored in a first bit location in an upper portion of said CAM address entry location and wherein said second bit is stored in a second bit location in a lower portion of said CAM address entry location.
A method for accelerating the routing of hierarchical addressing in a communication system which utilizes ternary hierarchical addressing and associated address masks, said method comprising the steps of:
- (a) obtaining communication system hierarchical addresses and associated masks to form address entries;
- and
- (b) storing said address entries in a content-addressable memory (CAM) by mask number wherein said mask number is defined as the number of contiguous ones in an associated address mask and wherein address entries having the highest mask number are stored in address entry locations at the top of the CAM and address entries having the lowest mask number being stored at address entry locations at the bottom of the CAM;
- wherein said step of obtaining communication system hierarchical addresses and associated masks comprises converting the ternary hierarchical addresses and associated address masks into binary-encoded ternary (BET) to form said address entries and wherein said CAM is a binary CAM;
- and
- wherein each ternary hierarchical address and associated mask comprises a plurality of ternary values and wherein said step of converting the ternary hierarchical addresses and associated address masks into BET comprises the conversion of each of the ternary values into first and second binary-encoded ternary (BET) bits as follows:
- 0ternary→01binary
- 1ternary→10binary
- Xternary→00binary,
- where X is defined as a “don't care” value.
Dependencies are inferred from the claim text.