Bidirectional data transfer protocol primarily controlled by a peripheral device

A method for bidirectionally transmitting a plurality of data values between a first processor means and a second processor means, each data value representing a respective plurality of data bits, the method comprising the steps of:

• forming and transmitting a direction indicating signal from the first processor means to the second processor means, to enable the second processor means to transfer data to the first processor means when the direction indicating signal is in a first state, and to notify the second processor means that the first processor means is ready to transfer data to the second processor means when the direction indicating signal is in a second state, said direction signal being exclusively driven by the first processor means;
• forming and transmitting the plurality of data values between the processors in a direction indicated by the direction indicating signal;
• and
• forming and transmitting a clock signal from the first processor means to the second processor means, said clock signal being exclusively driven by the first processor means, including the steps of:
• asynchronously changing the clock signal from a first state to a second state when each respective one of the plurality of data values is transferred, and
• resetting the clock signal to the first state after each individual bit of the data value is transferred.

A bidirectional communications system for transferring a plurality of data values between a first processor means and a second processor means, each data value representing a respective plurality of data bits, the system comprising;

• direction control means for forming and transmitting a direction signal from the first processor means to the second processor means, to enable the second processor means to transfer data to the first processor means when the direction signal has a first state, and to notify the second processor means that the first processor means is ready to transfer data to the second processor means when the direction signal has a second state, said direction control means including a first single physical signal line and said direction signal being carried from said first processor means to said second processor means only by said first single physical signal line;
• data transfer control means for forming and transmitting a clock signal from the first processor means to the second processor means, the data transfer control means including means for asynchronously changing the clock signal from a first state to a second state when each bit of a respective one of the plurality of data values is transferred, and for resetting the clock signal to the first state after each individual bit of a data value is transferred, said data transfer control means including a second single physical signal line and said clock signal being carried from said first processor means to said second processor means only by said second single physical signal line;
• and
• data transfer means responsive to the direction signal and the clock signal for transmitting the plurality of data values between the processors as indicated by the direction signal.