Single chip color CMOS image sensor with two or more line reading structure

A color MOS image sensor comprising:

• a pixel array formed from a plurality of individual pixels organized as rows and columns, said pixel array having superimposed thereon a color filter pattern;
• and
• a reading structure formed external to said pixel array and having at least two output lines and connected to said pixel array for simultaneously reading pixels from adjacent rows of said pixel array, said reading structure comprising:
• (a) a first set of storage capacitors, said first set of storage capacitors having at least one capacitor associated with each column of said pixel array;
• (b) a first set of switches for selectively placing signals from a first row of said pixel array on said first set of storage capacitors, the signal from each individual pixel of said first row being stored on said at least one storage capacitor from said first set of storage capacitors associated with the column of said individual pixel;
• (c) a second set of storage capacitors, said second set of storage capacitors having at least one capacitor associated with each column of said pixel array;
• and
• (d) a second set of switches for selectively placing signals from an adjacent row to said first row of said pixel array on said second set of storage capacitors, the signal from each individual pixel of said adjacent row being stored on said at least one storage capacitor from said second set of storage capacitors associated with the column of said individual pixel.

A MOS image sensor comprising:

• a pixel array organized into rows and columns;
• and
• a reading structure external to said pixel array and coupled to said pixel array for reading out rows of said pixel array, the reading structure comprising:
• (a) a reading array, said reading array including a plurality of memory cells organized as rows and columns, said reading array having approximately the same number of columns as said pixel array and also having at least two rows, and
• (b) a plurality of switches, the plurality of switches coupling a first row of said pixel array to a first row of said reading array so that the pixel signals from said first row of said pixel array are stored on the memory cells of said first row of said reading array, the plurality of switches also coupling a second row of said pixel array to a second row of said reading array so that the pixel signals from said second row of said pixel array are stored on the memory cells of said second row of said reading array.

A MOS image sensor comprising:

• a sensor array formed from a plurality of sensor units organized as rows and columns;
• and
• a reading structure being external to said sensors of said sensor array and coupled to said sensor array for reading out signals from rows of said sensor array, said reading structure comprising:
• (a) a memory array formed from a plurality of memory cells organized as rows and columns, said memory array having at least two rows;
• (b) a first set of switches for selectively placing signals from a first row of said sensor array on a first row of said memory array;
• and
• (c) a second set of switches for selectively placing signals from a second row of said sensor array on a second row of said memory array.