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US 6,288,954 B1Granted
Integrated circuit having an on-board reference generator
AssigneeMicron Technology, Inc.
InventorTroy Manning
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a differential amplifier having a first terminal that is operable to receive an input signal and having a second terminal. The integrated circuit also includes a reference circuit that generates a reference signal on the second terminal of the amplifier. During testing of the integrated circuit, the reference circuit can be activated to generate the reference signal such that a tester need not supply it as a test signal. During normal operation, however, either the reference circuit can generate the reference signal or the reference signal can be supplied by an external source.
Claims53
An integrated circuit, comprising:
- a first external integrated-circuit terminal operable to receive an input signal;
- a reference circuit operable to generate a first reference signal during a first mode of operation;
- and
- a differential amplifier having a first terminal coupled to the first external terminal and having a second terminal coupled to the reference circuit, the differential amplifier operable to amplify a difference between the input signal and the first reference signal during the first mode of operation.
1 more element
An integrated circuit, comprising:
- a first external integrated-circuit terminal operable to receive an input signal;
- a differential amplifier having a first terminal coupled to the first external terminal and having a second terminal;
- a reference circuit coupled to the amplifier and operable to generate a first reference signal on the second terminal;
- a second external integrated-circuit terminal operable to receive a second reference signal;
- and
- a buffer circuit coupled to the second external integrated-circuit terminal, the amplifier, and the reference circuit, the buffer circuit operable to uncouple the second external integrated-circuit terminal from the second terminal of the amplifier during a test mode of operation and to couple the second external integrated-circuit terminal to the second terminal of the amplifier during a nontest mode of operation.
3 more elements
An integrated circuit, comprising:
- first and second power-supply terminals;
- a differential amplifier having a first terminal operable to receive an input signal and having a second terminal;
- and
- a reference circuit coupled to the amplifier and operable to generate a first reference signal on the second terminal, the reference circuit comprising,
- a load coupled to the first power-supply terminal,
- a switch serially coupled to the load and operable to enable the reference circuit when closed and disable the reference circuit when open;
- and
- a diode serially coupled between the switch and the second power-supply terminal.
5 more elements
An integrated circuit, comprising:
- an external integrated-circuit input terminal operable to receive an input signal;
- a reference-signal generator operable to generate a first reference signal during a first operational mode;
- a first differential amplifier having a first input terminal coupled to the external integrated-circuit input terminal and having a second input terminal coupled to the reference-signal generator, the first differential amplifier operable to compare the input signal to the first reference signal during the first operational mode;
- and
- a second differential amplifier having a first input terminal coupled to the external integrated-circuit input terminal and having a second input terminal coupled to the reference-signal generator, the second differential amplifier operable to compare the input signal to the first reference signal during the first operational mode.
2 more elements
An integrated circuit, comprising:
- a conductive external input pad operable to receive an input signal;
- a conductive external reference pad operable to receive a first reference signal;
- a reference circuit operable to generate a second reference signal;
- and
- a circuit having a first input terminal coupled to the input pad and having a second input terminal coupled to the reference pad and to the reference circuit, the circuit operable to compare the input signal to the first reference signal during a first operational mode, and to compare the input signal to the second reference signal during a second operational mode.
2 more elements
An integrated circuit, comprising:
- a conductive external input pad operable to receive an input signal;
- a conductive external reference pad operable to receive a first reference signal;
- a reference-signal generator operable to generate a second reference signal;
- and
- a circuit having a first input terminal coupled to the input pad and having a second input terminal coupled to the reference pad and to the reference-signal generator, the circuit operable to amplify a difference between the input signal and the first reference signal during a nontest mode of operation, and to amplify a difference between the input signal and the second reference signal during a test mode of operation.
2 more elements
An integrated circuit, comprising:
- a package;
- an input-signal terminal accessible from outside of the package and operable to receive an input signal;
- a reference-signal terminal accessible from outside of the package and operable to receive a first reference signal;
- a reference circuit disposed inside of the package and operable to generate a second reference signal;
- and
- a circuit disposed inside of the package and having a first input terminal coupled to the input-signal terminal and having a second input terminal coupled to the reference-signal terminal and to the reference circuit, the circuit operable to amplify a difference between the input signal and the first reference signal during a nontest mode, and to amplify a difference between the input signal and the second reference signal during a test mode.
3 more elements
An integrated circuit, comprising:
- a package;
- an input-signal terminal and a reference-signal terminal accessible from outside of the package;
- a circuit disposed inside of the package and having a first input terminal coupled to the input-signal terminal and having a second input terminal;
- a buffer disposed within the package and having an input terminal coupled to the reference-signal terminal and having an output terminal coupled to the second input terminal of the circuit, the buffer operable to couple the reference-signal terminal to the circuit during a nontest mode of operation and to uncouple the reference-signal terminal from the circuit during the test mode of operation;
- and
- a reference-signal generator disposed inside of the package and having an output terminal coupled to the second input terminal of the circuit.
3 more elements
A memory circuit, comprising:
- a conductive external reference-signal pad operable to receive a first reference signal;
- a conductive external address-signal pad operable to receive an address signal;
- a conductive data-signal pad;
- a reference-signal generator operable to generate a second reference signal;
- an address decoder that includes a differential amplifier having a first input terminal coupled to the reference-signal pad and having a second input terminal coupled to the address-signal pad and to the reference-signal generator, the differential amplifier operable to receive the first reference signal during a nontest mode and to receive the second reference signal during a test mode;
- a memory array coupled to the address decoder;
- and
- a read/write circuit coupled to the data-signal pad and to the memory array.
5 more elements
A memory circuit, comprising:
- a conductive external reference-signal pad operable to receive a first reference signal;
- a conductive external data-signal pad operable to receive a data signal;
- a conductive address-signal pad;
- an address decoder coupled to the address-signal pad;
- a memory array coupled to the address decoder;
- a reference-signal generator operable to generate a second reference signal;
- and
- a read/write circuit coupled to the memory array and including a differential amplifier having a first input terminal coupled to the reference-signal pad and having a second terminal coupled to the data-signal pad and to the reference-signal generator, the differential amplifier operable to process the data signal and the first reference signal during a nontest mode and to process the data signal and the second reference signal during a test mode.
5 more elements
A memory circuit, comprising:
- a conductive external reference-signal pad operable to receive a first reference signal;
- a conductive address-signal pad;
- a conductive data-signal pad;
- a conductive external control-signal pad operable to receive a control signal;
- an address decoder coupled to the address-signal pad;
- a memory array coupled to the address decoder;
- a read/write circuit coupled to the data-signal pad and to the memory array;
- a reference-signal generator operable to generate a second reference signal;
- and
- a control circuit coupled to the address decoder, the control circuit including a differential amplifier having a first input terminal coupled to the reference-signal pad and to the reference-signal generator and having a second terminal coupled to the control-signal pad, the differential amplifier operable to amplify a difference between the control signal and the first reference signal during a nontest mode and to amplify a difference between the control signal and the second reference signal during a test mode.
7 more elements
A memory circuit, comprising:
- a package;
- a reference-signal terminal accessible from outside of the package;
- an address-signal terminal accessible from outside of the package;
- a data-signal terminal accessible from outside of the package;
- an address decoder disposed within the package and including first and second differential amplifiers each having a first input terminal coupled to the reference-signal terminal and having a second input terminal coupled to the address-signal terminal;
- a reference-signal generator disposed within the package and having an output terminal coupled to the first input terminals of the first and second amplifiers;
- a memory array disposed within the package and coupled to the address decoder;
- and
- a read/write circuit disposed within the package and coupled to the data-signal terminal and to the memory array.
6 more elements
A memory circuit, comprising:
- a package;
- a reference-signal terminal accessible from outside of the package;
- an address-signal terminal accessible from outside of the package;
- a data-signal terminal accessible from outside of the package;
- an address decoder disposed within the package and coupled to the address-signal terminal;
- a memory array disposed within the package and coupled to the address decoder;
- a read/write circuit disposed within the package, coupled to the memory array, and including first and second differential amplifiers each having a first input terminal coupled to the reference-signal terminal and having a second terminal coupled to the data-signal terminal;
- and
- a reference-signal generator disposed within the package and having an output terminal coupled to the first input terminals of the amplifiers.
6 more elements
A memory circuit, comprising:
- a package;
- a reference-signal terminal accessible from outside of the package;
- an address-signal terminal accessible from outside of the package;
- a data-signal terminal accessible from outside of the package;
- a control-signal terminal accessible from outside of the package;
- an address decoder disposed within the package and coupled to the address-signal terminal;
- a memory array disposed within the package and coupled to the address decoder;
- a read/write circuit disposed within the package and coupled to the data-signal terminal and to the memory array;
- a control circuit disposed within the package and coupled to the address decoder, the control circuit including first and second differential amplifiers each having a first input terminal coupled to the reference-signal terminal and having a second terminal coupled to the control-signal terminal;
- and
- a reference-signal generator disposed within the package and having an output terminal coupled to the first terminals of the amplifiers.
8 more elements
An electronic system, comprising:
- a data input device;
- a data output device;
- and
- a computer circuit coupled to the data input and output devices and including a processor and a memory circuit coupled to the processor, the memory circuit including:
- a package;
- a reference-signal terminal accessible from outside of the package;
- an address-signal terminal accessible from outside of the package;
- a data-signal terminal accessible from outside of the package;
- an address decoder disposed within the package and including and second differential amplifiers each having a first input terminal coupled to the reference-signal terminal and having a second input terminal coupled to the address-signal terminal;
- a reference-signal generator disposed within the package and having an output terminal coupled to the first input terminals of the amplifiers;
- a memory array disposed within the package and coupled to the address decoder;
- and
- a read/write circuit disposed within the package and coupled to the data-signal terminal and to the memory array.
10 more elements
An electronic system, comprising:
- a data input device;
- a data output device;
- and
- a computer circuit coupled to the data input and output devices and including a processor and a memory circuit coupled to the processor, the memory circuit including:
- a package;
- a reference-signal terminal accessible from outside of the package;
- an address-signal terminal accessible from outside of the package;
- a data-signal terminal accessible from outside of the package;
- an address decoder disposed within the package and coupled to the address-signal terminal;
- a memory array disposed within the package and coupled to the address decoder;
- a read/write circuit disposed within the package, coupled to the memory array, and including first and second differential amplifiers each having a first input terminal coupled to the reference-signal terminal and having a second terminal coupled to the data-signal terminal;
- and
- a reference-signal generator disposed within the package and having an output terminal coupled to the first input terminals of the amplifiers.
10 more elements
An electronic system, comprising:
- a data input device;
- a data output device;
- and
- a computer circuit coupled to the data input and output devices and including a processor and a memory circuit coupled to the processor, the memory circuit including:
- a package;
- a reference-signal terminal accessible from outside of the package;
- an address-signal terminal accessible from outside of the package;
- a data-signal terminal accessible from outside of the package;
- a control-signal terminal accessible from outside of the package;
- an address decoder disposed within the package and coupled to the address-signal terminal;
- a memory array disposed within the package and coupled to the address decoder;
- a read/write circuit disposed within the package and coupled to the data-signal terminal and to the memory array;
- a control circuit disposed within the package and coupled to the address decoder, the control circuit including first and second differential amplifiers each having a first input terminal coupled to the reference-signal terminal and having a second terminal coupled to the control-signal terminal;
- and
- a reference-signal generator disposed within the package and having an output terminal coupled to the first terminals of the amplifiers.
12 more elements
A method, comprising:
- generating a first reference signal inside of an integrated circuit;
- receiving a second reference signal from outside of the integrated circuit;
- receiving an input signal from outside of the integrated circuit;
- comparing the first reference signal and the input signal during a test mode of the integrated circuit;
- and
- comparing the second reference signal and the input signal during a nontest mode of the integrated circuit.
3 more elements
A method, comprising:
- during a first time period, respectively providing a first externally generated input signal and an externally generated reference signal to first and second input terminals of a circuit disposed in an integrated circuit and amplifying a difference between the input and reference signals with the circuit;
- and
- during a second time period, respectively providing a second externally generated input signal and an internally generated reference signal to the first and second input terminals of the circuit and amplifying a difference between the second input and internally generated reference signals with the circuit.
An integrated circuit, comprising:
- first and second power-supply terminals;
- a differential amplifier having a first terminal operable to receive an input signal and having a second terminal;
- and
- a reference circuit coupled to the amplifier and operable to generate a first reference signal on the second terminal, the reference circuit comprising,
- a first transistor coupled to the first power-supply terminal,
- a switch serially coupled to the first transistor and operable to enable the reference circuit when closed and disable the reference circuit when open;
- and
- a second, diode-connected transistor serially coupled between the switch and the second power-supply terminal.
5 more elements
An integrated circuit, comprising:
- a first external integrated-circuit terminal operable to receive an input signal;
- a first differential amplifier having a first terminal coupled to the first external terminal, a second terminal, and a third terminal operable to receive a first clock signal;
- a second differential amplifier having a first terminal coupled to the first external terminal, a second terminal, and a third terminal operable to receive a second clock signal;
- and
- a reference circuit coupled to and operable to generate a first reference signal on the second terminals of the first and second amplifiers.
2 more elements
Dependencies are inferred from the claim text.