Analog memory device and method for reading data stored therein
AssigneeOki Electric Industry Co., Ltd.
InventorMakoto Aikawa
Life of this patent
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Abstract
A read-out circuit, includes a data detecting circuit which detects analog data of a selected memory cell; a data condition deciding circuit which decides whether or not the analog data detected by the data detecting circuit is in a normal range; and a controller which normalizes an output signal for the selected memory cell in accordance with the decision of the data condition deciding circuit.
Claims23
A read-out circuit which reads analog data stored in memory cells, comprising:
- a data detecting circuit which detects analog data of a selected memory cell;
- a data condition deciding circuit which decides whether or not the analog data detected by the data detecting circuit is in a normal range;
- and
- a controller which normalizes the analog data of the selected memory cell in accordance with the decision of the data condition deciding circuit;
- wherein the data condition deciding circuit comprises a comparator which compares a predetermined reference value to the difference between the detected data of the currently selected memory cell and latest output data, which is outputted one step prior to the current step.
A read-out circuit which reads analog data stored as threshold voltages of memory cells, comprising:
- a slow ramp circuit, which supplies a control gate voltage changed continuously or step-wise;
- a first sample-and-hold circuit which stores a threshold voltage of a currently selected memory cell;
- a second sample-and-hold circuit which stores the latest threshold voltage, which is outputted one step prior to the current step;
- a comparator which compares a predetermined reference value to the difference between the threshold voltage of the selected memory cell and latest output signal, and outputs a control signal when the difference is larger than the reference value;
- and
- a pulse generating circuit which generates a pulse signal in response to the control signal supplied from the comparator, and supplies it to the second sample-and-hold circuit so that the second sample-and-hold circuit supplies an output signal corresponding to the threshold voltage of the selected memory cell when the difference between the latest output signal and threshold voltage is smaller than the reference value, while outputs the latest output signal for the selected memory cell when the difference between the latest output signal and threshold voltage is larger than the reference value.
A read-out circuit which reads analog data stored as threshold voltages of memory cells, comprising:
- a slow ramp circuit, which supplies a control gate voltage which is changed continuously or step-wise;
- a first sample-and-hold circuit which stores a threshold voltage of a selected memory cell;
- a second sample-and-hold circuit which stores the latest output signal, which is outputted one step prior to the current step;
- a comparator which compares a predetermined reference value to the difference between the threshold voltage of the selected memory cell and latest output signal and outputs a control signal when the difference is larger than the reference value;
- a pulse generating circuit which generates a pulse signal in response to the control signal supplied from the comparator;
- a third sample-and-hold circuit which stores the difference between the latest output signal and second latest output signal as an adjust value;
- an adder which adds the adjust value supplied from the third sample-and-hold circuit to the latest output signal in response to the control signal supplied from the comparator so that the sum of the latest output signal and the adjust value is supplied as a corrected output signal for the selected memory cell;
- and
- a selector which selects one from the threshold voltage of the selected memory cell and corrected output signal in response to the control signal from the comparator, so that the threshold voltage of the selected memory cell is outputted when the difference between the threshold voltage of the selected memory cell and latest output signal is smaller than the reference value, while the corrected output signal is outputted when the difference between the threshold voltage of the selected memory cell and latest output signal is larger than the reference value.
A method for reading analog data stored in memory cells, comprising the steps of:
- detecting data of a selected memory cell;
- deciding whether or not the detected data of the selected memory cell is in a normal range, and
- normalizing the analog data of the selected memory cell in accordance with the decision;
- wherein the difference between the detected data of the currently selected memory cell and the latest output signal, which is outputted one step prior to the current step, is compared to a predetermined reference value so as to decide whether or not the detected data of the selected memory cell is in the normal range.
A method for reading analog data stored in memory cells, comprising the steps of:
- detecting data of a selected memory cell;
- deciding whether or not the detected data of the selected memory cell is in a normal range, and
- normalizing an output signal for the selected memory cell in accordance with the decision;
- storing the detected data of the selected memory cell;
- providing lowest and highest acceptable values;
- comparing the voltage of the detected data of the selected memory cell to the lowest and highest acceptable values;
- and
- outputting the detected data of the selected memory cell when the detected data is in between the lowest and highest acceptable values, while outputting the latest output data for the selected memory cell when the detected data of the selected memory cell is out of the range between the lowest and highest acceptable values.
An analog memory, comprising:
- a memory cell array having memory cells each storing analog data;
- and
- a read-out circuit which reads the analog data from the memory cell array, the read-out circuit comprising:
- (1) a data detecting circuit which detects analog data of a selected memory cell;
- (2) a data condition deciding circuit which decides whether or not the analog data detected by the data detecting circuit is in a normal range;
- and
- (3) a controller which normalizes the analog data of the selected memory cell in accordance with the decision of the data condition deciding circuit;
- wherein the data condition deciding circuit comprises a comparator which compares a predetermined reference value to the difference between the detected data of the currently selected memory cell and latest output data, which is outputt one step prior to the current step, and supplies it to a second sample-and-hold circuit so that the second sample-and-hold circuit supplies an output signal corresponding to the gate threshold voltage of the selected memory cell when the difference between the latest output signal and gate threshold voltage is smaller than the reference value, which outputs the latest output signal for the selected memory cell when the difference between the latest output signal and gate threshold voltage is larger than the reference value.
An analog memory, comprising:
- a memory cell array having memory cells each storing analog data as a threshold voltage thereof;
- and
- a read-out circuit which reads the analog data from the memory cell array, the read-out circuit comprising:
- (1) a slow ramp circuit, which supplies a control gate voltage changed continuously or step-wise;
- (2) a first sample-and-hold circuit which stores a threshold voltage of a currently selected memory cell;
- (3) a second sample-and-hold circuit which stores the latest threshold voltage, which is outputted one step prior to the current step;
- (4) a comparator which compares a predetermined reference value to the difference between the threshold voltage of the selected memory cell and latest output signal, and outputs a control signal when the difference is larger than the reference value;
- and
- (5) a pulse generating circuit which generates a pulse signal in response to the control signal supplied from the comparator, and supplies it to the second sample-and-hold circuit so that the second sample-and-hold circuit supplies an output signal corresponding to the threshold voltage of the selected memory cell when the difference between the latest output signal and threshold voltage is smaller than the reference value, while outputs the latest output signal for the selected memory cell when the difference between the latest output signal and threshold voltage is larger than the reference value.
An analog memory, comprising:
- a memory cell array having memory cells each storing analog data as a threshold voltage thereof;
- and
- a read-out circuit which reads the analog data from the memory cell array, the read-out circuit comprising:
- (1) a slow ramp circuit, which supplies a control gate voltage which is changed continuously or step-wise;
- (2) a first sample-and-hold circuit which stores a threshold voltage of a selected memory cell;
- (3) a second sample-and-hold circuit which stores the latest output signal, which is outputted one step prior to the current step;
- (4) a comparator which compares a predetermined reference value to the difference between the threshold voltage of the selected memory cell and latest threshold voltage and outputs a control signal when the difference is larger than the reference value;
- (5) a pulse generating circuit which generates a pulse signal in response to the control signal supplied from the comparator;
- (6) a third sample-and-hold circuit which stores the difference between the latest output signal and second latest output signal as an adjust value;
- (7) an adder which adds the adjust value supplied from the third sample-and-hold circuit to the latest output signal in response to the control signal supplied from the comparator so that the sum of the latest output signal and the adjust value is supplied as a corrected output signal for the selected memory cell;
- and
- (8) a selector which selects one from the threshold voltage of the selected memory cell and corrected output signal in response to the control signal from the comparator, so that the threshold voltage of the selected memory cell is outputted when the difference between the threshold voltage of the selected memory cell and latest output signal is smaller than the reference value, while the corrected output signal is outputted when the difference between the threshold voltage of the selected memory cell and latest output signal is larger than the reference value.
Dependencies are inferred from the claim text.