Structure and method of an encoded ternary content addressable memory (CAM) cell for low-power compare operation
AssigneeSilicon Access Networks, Inc.
InventorsHing Wong, Subramani Kengeri
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Abstract
The invention discloses a low-power ternary CAM by utilizing four encoded comparand datalines, C0, C1, C2, and C3 in a twin ternary cell. The twin ternary cell is a composite of two ternary CAM bits. The two binary CAM bits are coded so that only one of four comparand datalines is toggled during a compare operation. The encoded data is stored and used for comparison. In one embodiment, the four possible states for the 2 bit comparands are coded as 0001, 0010, 0100, and 1000.
Claims17
A structure, comprising:
- a twin ternary cell, comprising:
- a first, content addressable memory (CAM) bit having a first comparand line;
- a second CAM bit having a second comparand dataline;
- a third CAM bit having a third comparand dataline;
- and
- a fourth CAM bit having a fourth comparand dataline;
- wherein during a compare operation, one of the first, second, third, or fourth comparand dataline being asserted.
A method for generating a comparand dataline in a content addressable memory (CAM), comprising the steps of:
- in a twin ternary cell:
- encoding a first comparand dataline representing a first state in a first CAM bit;
- encoding a second comparand dataline representing a second state in a second CAM bit;
- encoding a third comparand dataline representing a third state in a third CAM bit;
- encoding a fourth comparand dataline representing a fourth state in a fourth CAM bit;
- and
- during a compare operation, asserting one of the encoded first, second, third, or fourth comparand dataline.
A structure, comprising:
- a twin ternary cell, comprising:
- a first content addressable memory (CAM) bit having a first comparand dataline;
- a second CAM bit having a second comparand dataline;
- a third CAM bit having a third comparand dataline;
- and
- a fourth CAM bit having a fourth comparand dataline;
- wherein during a compare operation, the first, second, third, and fourth comparand datalines are globally masked thereby none of the first, second, third, or fourth CAM bit is turned ON.
Dependencies are inferred from the claim text.