CMOS amplifier providing automatic offset cancellation
AssigneeBroadcom Corporation
InventorsCheng-chung Shih, Jiann-chyi Shieh
Life of this patent
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AssigneeBroadcom Corporation
InventorsCheng-chung Shih, Jiann-chyi Shieh
Estimating the term…
An amplifier circuit is responsive to an input data signal which is substantially DC balanced. The amplifier circuit is operative to generate an amplified data signal, and includes: a limiting amplifier responsive to the input data signal and to an error correcting signal, the limiting amplifier being operative to generate the amplified data signal; a feed back circuit responsive to a signal proportional to the amplified data signal, the feed back circuit being operative to generate the error correcting signal. The feed back circuit includes: a low pass filter responsive to the signal proportional to the amplified data signal, and operative to generate a filtered signal; and an error amplifier responsive to the filtered signal, and operative to provide the error correcting signal to the limiting amplifier; whereby offset voltage caused by process characteristics of the limiting amplifier, and temperature variations in the limiting amplifier are canceled by the error correcting feedback signal. The limiting amplifier further includes: a first amplifying stage operative to provide a first stage amplified signal; a second amplifying stage responsive to the first stage amplified signal, and operative to provide a second stage amplified signal; and a third amplifying stage responsive to the second stage amplified signal, and operative to generate the amplified data signal. The low pass filter of the feedback circuit generates the filtered signal in response to the second stage amplified signal; and the error correcting signal is provided to the second amplifying stage of the limiting amplifier.
An amplifier circuit responsive to a substantially DC balanced input data signal, and operative to generate an amplified data signal, the amplifier circuit comprising:
A post-amplifier circuit for use in a fiber optic receiver, said post-amplifier circuit being responsive to a substantially DC balanced input data signal, and operative to generate an amplified data signal, the amplifier circuit comprising:
Dependencies are inferred from the claim text.