System for preventing a CPU from an input of a power source until the completion of transferring BIOS data from a hard disk to a main memory

A BIOS storing and controlling system which comprises a central processing unit, a memory controller connected to said central processing unit, a main memory device connected to said memory controller, a system controller connected to said central processing unit and to said memory controller, a hard disk controller connected to said central processing unit, to said memory controller, and to said system controller, and a hard disk connected to said hard disk controller, wherein:

• said hard disk. stores BIOS data in a predetermined area, said BIOS data being other than a pre-boot program;
• said system controller producing and supplying, at a time of input of a power source, an initial signal to said central processing unit;
• said central processing unit being held at an initial state from reception of said initial signal until reception of an initial state release signal;
• said hard disk controller and said memory controller transferring said BIOS data of said hard disk to said main memory device in a time interval of said initial state of said central processing unit, said hard disk controller producing and supplying said initial state release signal through said system controller to said central processing unit after transfer of said BIOS data;
• and
• said central processing unit starting to access said main memory device when said central processing unit is supplied with said initial state release signal from said hard disk controller.

A BIOS storing and controlling method in a BIOS memorizing and controlling system which comprises a central processing unit, a main memory device, and a fixed memory device which are connected to each other, said BIOS holding and controlling method comprising:

• a step of storing BIOS data in a predetermined area of said fixed memory device, said BIOS data being other than a pre-boot program;
• a step of holding an initial state of said central processing unit from input of a power source until receipt of an initial state release signal;
• a step of transferring said BIOS data to said main memory device in a time interval of said initial state of said central processing unit,
• a step of producing and supplying said initial state to said central processing unit;
• and
• a step of making, in response to said initial state release signal, said central processing unit start to access said main memory device.