Two step thread creation with register renaming
AssigneeLucent Technologies Inc.
InventorsHarry Dwyer, III, Tor E. Jeremiassen, Hubert Rae McLellan, Jr.
Life of this patent
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Abstract
An apparatus and method in digital processing provides a simple and efficient way of communicating parameters from a parent thread to child thread with two step thread creation. The method comprising the steps of: allocating hardware context for the child thread; enabling the parent thread to execute other instructions wherein parent thread register writes update both parent and child architectural registers; and spawning the child thread. In essence, the parent thread sends parameters to the child by writing to the parent's registers prior to spawning of the child thread.
Claims17
In a digital processing system a method for communicating values between a parent thread having parent architectural registers and a child thread, the method comprising the steps of:
- allocating child architectural registers for the child thread;
- enabling the parent thread for writing to a parent thread register wherein both the parent architectural register and the child architectural register are updated;
- and
- spawning the child thread.
In a digital processing system a device for communicating values between a parent thread having parent architectural registers and a child thread, the device comprises:
- allocating means for allocating associated child architectural registers for a child thread;
- processor means for enabling the parent thread for writing to the parent architectural registers corresponding to a particular register;
- and
- a register remapping device for remapping the child architectural registers to correspond to the write to the parent architectural registers;
- wherein after spawning the child thread, a first write, by the child thread to the particular register or by the parent thread to the particular register will be assigned a free physical register by the register remapping device.
Dependencies are inferred from the claim text.