Hardware verification tool for multiprocessors

A method for detecting architectural violations in a multiprocessor computer system which executes a testcase instruction stream having a plurality of instructions which write a plurality of monotonically increasing values to a memory location and a plurality of read instructions which read from the memory location, segments of the testcase instruction stream being executed in parallel by individual processors in the plurality, the method comprising:

• defining a table in memory for at least one of the processors, the table having a plurality of entries which include a last observed value field and a window field, the window field having a lowest observable value and a highest observable value;
• initializing the lowest observable value in the table in memory with the lowest value written to the memory location by an instruction in the segment executed by the at least one processor;
• and
• creating a new entry in the table when the at least one processor observes a new value in the memory location.

A method for detecting architectural violations in a multiprocessor computer system, the method comprising:

• generating a testcase instruction stream having a plurality of instructions which write a plurality of monotonically increasing values to a memory location and a plurality of read instructions which read from the memory location;
• detecting dependent instructions in the testcase instruction stream;
• modifying the testcase instruction stream by inserting logging instructions in the testcase instruction stream which cause observable values of the memory location to be written to a logging memory;
• executing segments of the testcase instruction stream in parallel on a plurality of processors;
• defining a table in memory for at least one of the processors, the table in memory for at least one of the processors, the table having a plurality of entries which include a last observed value field and a window field, the window field having a lowest observable value and a highest observable value;
• initializing the lowest observable value in the table in memory with the lowest value written to the memory location by an instruction in the segment executed by the at least one processor;
• and
• creating a new entry in the table when the at least one processor observes a new value in the memory location.

An apparatus for detecting architectural violation in a multiprocessor computer system, the apparatus comprising:

• means for generating a testcase instruction stream having a plurality of instructions which write a plurality of monotonically increasing values to a memory location and a plurality of read instructions which read from the memory location;
• means for detecting dependent instructions in the testcase instruction stream:
• means for modifying the testcase instruction stream by inserting logging instructions in the testcase instruction stream which cause observable values of the memory location to be written to a logging memory;
• means for executing segment of the testcase instruction stream in parallel on a plurality of processors;
• means for defining a table in memory for at least one of the processors, the table having a plurality of entries which include a last observed value field and a window field, the window field having a lowest observable value and a highest observable value;
• means for initializing the lowest observable value in the table in memory with the lowest value written to the memory location by an instruction in the segment executed by the at least one processor;
• and
• means for creating a new entry in the table when the at least one processor observes a new value in the memory location.