System and method for on-chip filter tuning
AssigneeBroadcom Corporation
InventorsPieter Vorenkamp, Klaas Bult, Frank Carr
Life of this patent
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AssigneeBroadcom Corporation
InventorsPieter Vorenkamp, Klaas Bult, Frank Carr
Estimating the term…
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
An integrated circuit chip comprising:
An integrated circuit tuner comprising:
A method for on-chip filter tuning comprising:
Electronic tuning circuitry for tuning a filter comprising:
Electronic tuning circuitry for tuning a filter comprising:
Electronic tuning circuitry for tuning a filter comprising:
Dependencies are inferred from the claim text.