US 6,285,744 B1Granted

Telephony test system with adjustable output impedance

AssigneeTollgrade Communications, Inc.

InventorsRegis J. Nero, Jr., Louis W. Hiener, III, Richard A. Bair, Jr., Frederick J. Kiko, Leo W. Manuel, II, Lester Mintzer

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Abstract

A telephone test system (2) includes a controller (4), a programmable gate array (PGA) (24) and a digital signal processor (DSP) (26) connected by a common bus (20). The PGA (24) includes an output connected to an input of a digital-to-analog converter (DAC) (36) and input connected to an output of an analog-to-digital converter (ADC) (32). A driver circuit (46) is connected between the DAC (36) and a telephone circuit (60) and between the ADC (32) and the telephone circuit (60). Under the control of the DSP (26), the driver circuit (46) generates voltages to the telephone circuit (60) and samples the response of the telephone circuit (60) to such generated voltages. The driver circuit (46) includes control inputs for receiving from the PGA (24) an impedance adjust signal (D) and a resistance adjust signal (R). An output impedance (124) of the driver circuit (46) connected to the telephone circuit (60) is adjustable as a function of the impedance adjust signal (D) and/or the resistance adjust signal (R).

Claims16

Dependent claims

A telephony test system for testing a telephone circuit having a tip and a ring, the telephony test system comprising:

a programmable gate array (PGA) having a plurality of logic gates and a plurality of input/output pins, with the logic gates programmably configurable in an array configuration, with the array configuration programmably connectable to the plurality of input/output pins of the PGA;
a controller connected to the PGA via a bus;
a digital-to-analog converter (DAC) having an input connected to an output of the PGA;
an analog-to-digital converter (ADC) having an output connected to an input of the PGA;
and
a first driver circuit having a first input connectable to an output of the DAC, a first output connectable to an input of the ADC, a second output connected to one of the tip and the ring and a second input connectable to the one of the tip and the ring, with the first driver circuit having a control input adapted to receive an impedance adjust signal, wherein:
the controller causes the PGA to configure the plurality of logic gates in a desired array configuration, and causes the PGA to connect the desired array configuration and the plurality of input/output pins in a desired manner;
as a function of the controller programming thereof, the PGA controls the DAC to generate an output voltage to the first driver circuit and controls the ADC to sample from the PGA a signal corresponding to a signal impressed on the one of the tip and the ring;
the first driver circuit generates to the one of the tip and the ring a voltage corresponding to the output voltage generated by the DAC and the impedance adjust signal received at the control input;
and
the first driver circuit generates to the one of the tip and the ring an output impedance corresponding to the impedance adjust signal received at the control input.

8 more elements

A testing apparatus for testing a telephone circuit, the testing apparatus comprising:

a controller;
a driver circuit having an input, an output and a control input adapted to receive an impedance adjust signal;
a programmable gate array (PGA) connected between the controller and the driver circuit and adapted to receive data and control signals from the controller;
a digital-to-analog converter (DAC) connected between the PGA and the input of the driver circuit, with the DAC generating to the input of the driver circuit an output voltage corresponding to data received by the DAC from the PGA;
and
an analog-to-digital converter (ADC) connected between the driver circuit and the PGA, with the ADC generating to the PGA data corresponding to a signal received at an input of the ADC from the driver circuit, with the signal received at the input to the ADC corresponding to the response of the telephone circuit to a voltage generated by the driver circuit, wherein:
in response to being programmed by the controller, the PGA controls the operation of the DAC and the ADC such that the ADC samples signals received at the input thereof in synchronization with the DAC generating signals to the driver circuit;
the driver circuit generates on its output a signal corresponding to the output voltage of the DAC received at the input of the driver circuit and the impedance adjust signal received at the control input;
and
the driver circuit adapts its output impedance as a function of the impedance adjust signal received at the control input.

7 more elements

A method of testing a tip and a ring of a telephone circuit for an AC delta connected equivalent circuit, the method comprising the steps of:

(a) impressing on the tip an AC voltage Vst and simultaneously impressing on the ring an AC voltage Vsr, with the frequency, amplitude and phase of Vst equal to frequency, amplitude and phase of Vsr with the voltage Vst having output impedance Rst and the voltage Vsr having an output impedance Rsr, and with Rst=Rsr;
(b) determining a peak amplitude |Vst| of the voltage Vst;
(c) determining a peak amplitude |Vsr| of the voltage Vsr;
(d) sampling a tip-to-ground voltage Vtg;
(e) sampling a ring-to-ground voltage Vrg;
(f) determining for the voltage Vtg a peak amplitude |Vtg| and phase θtg;
(g) determining for the voltage Vrg a peak amplitude |Vrg| and phase θrg;
(h) determining a tip-to-ground resistance Rtg=Rst÷((|Vst|÷|Vtg|)cos θtg−1);
(i) determining a tip-to-ground capacitance Ctg=−|Vst|sin θtg÷|Vtg|ωRst, with ω=(2π)(frequency of Vst and Vsr);
(j) determining a ring-to-ground resistance Rrg=Rsr÷((|Vsr|÷|Vrg|)cos θrg−1);
(k) determining a ring-to-ground capacitance Crg=−|Vsr|sin θtg÷|Vrg|ωRsr;
(l) adjusting the amplitude of Vsr to an amplitude different than the amplitude of Vst, with the output impedance Rst equal to the output impedance Rsr;
(m) sampling a tip-to-ground voltage Vtg;
(n) sampling a ring-to-ground voltage Vrg;
(o) determining for the voltage Vtg a peak amplitude |Vtg| and phase θtg;
(p) determining for the voltage Vrg a peak amplitude |Vrg| and phase θrg;
(q) determining a source-to-ring conductance Gsr=1÷Rsr;
(r) determining a ring-to-ground admittance Yrg=(Re)Yrg+j(Im)Yrg=(1÷Rrg)+jωCrg, with (Re)Yrg=real component of Yrg and (Im)Yrg=imaginary component of Yrg.
(s) determining a tip-to-ring admittance Y tr = ( Re ) ⁢ Y tr + j ⁡ ( Im ) ⁢ Y tr = [LeftBracketingBar] Y tr [RightBracketingBar] ⁢ cos ⁢ ⁢ θ Y tr + j ⁢ [LeftBracketingBar] Y tr [RightBracketingBar] ⁢ sin ⁢ ⁢ θ Y tr , ⁢ where [LeftBracketingBar] Y tr [RightBracketingBar] = [LeftBracketingBar] Y tg [RightBracketingBar] ⁢ ( ( Re ) ⁢ Y rg + G sr ) 2 + ( Im ) ⁢ Y rg 2 ( [LeftBracketingBar] V tg [RightBracketingBar] ⁢ cos ⁢ ⁢ θ tg - [LeftBracketingBar] V rg [RightBracketingBar] ⁢ cos ⁢ ⁢ θ rg ) 2 + ( [LeftBracketingBar] V tg [RightBracketingBar] ⁢ sin ⁢ ⁢ θ tg - [LeftBracketingBar] V rg [RightBracketingBar] ⁢ sin ⁢ ⁢ θ rg ) 2 and θ Y tr = θ tg + tan - 1 ⁡ [ ( Im ) ⁢ Y rg ( Re ) ⁢ Y rg + G sr ] tan - 1 ⁡ [ [LeftBracketingBar] V tg [RightBracketingBar] ⁢ sin ⁢ ⁢ θ tg - [LeftBracketingBar] V rg [RightBracketingBar] ⁢ sin ⁢ ⁢ θ rg [LeftBracketingBar] V tg [RightBracketingBar] ⁢ cos ⁢ ⁢ θ tg - [LeftBracketingBar] V rg [RightBracketingBar] ⁢ cos ⁢ ⁢ θ rg ]
(t) determining a tip-to-ring resistance Rtr=1÷(Re)Ytr, with (Re)Ytr=the real component of Ytr;
and
(u) determining a tip-to-ring capacitance Ctr=(Im)Ytr÷ω, with (Im)Ytr=the imaginary component of Ytr.

19 more elements

Dependencies are inferred from the claim text.