System and method of scheduling data cells based upon sustainable cell rate and peak cell rate over a variable bandwidth channel

A method of determining whether to transmit a data cell of a virtual circuit (VC) on a network connection, the method comprising:

• a calculation step comprising the step of:
• adding a sustainable cell rate (SCR) step size of a virtual circuit (VC) to
• a SCR step sum of the VC;
• a transmit determination step comprising the step of:
• comparing the SCR step sum to a threshold value;
• and
• a transmission step if it is determined to transmit, the transmission step comprising the steps of:
• sending on the network connection a data cell of the VC;
• and
• decrementing the SCR step-sum by the threshold value.

A segmentation and reassembly (SAR) controller, comprising:

• a co-processor;
• a memory coupled to the co-processor;
• and
• logic stored in the memory for execution on the co-processor, the logic comprising:
• table generation logic, comprising:
• logic for running a simulation of the network connection to determine when each of the plurality of VCs is ready to transmit based upon a SCR step size and a SCR step sum, wherein each VC is assumed to have data available throughout the simulation;
• and
• logic for adding a listing to the table of each VC that is determined ready to send;
• transmit determination logic, comprising:
• logic for selecting in a round robin fashion a specific VC of the plurality of VCs from the table;
• and
• logic for comparing a second SCR step sum to a threshold value;
• transmission logic, comprising:
• logic for sending on the network connection the available data cell of the specific VC;
• and
• logic for decrementing the second SCR step-sum by the threshold value;
• and
• update logic, comprising:
• logic for incrementing the second SCR step sum of each VC by the corresponding SCR step size.

A segmentation and reassembly (SAR) controller, comprising:

• a co-processor;
• a memory coupled to the co-processor;
• and
• logic stored in the memory for execution on the co-processor, comprising:
• calculation logic, comprising:
• logic for adding a peak cell rate (PCR) step sum to a PCR step sum;
• transmit determination logic, comprising:
• logic for comparing a sustainable sell rate (SCR) step sum of a virtual circuit (VC) to a threshold value;
• and
• transmission logic, comprising:
• logic for sending on the network connection a data cell of the VC;
• and
• logic for decrementing the SCR step-sum by the threshold value.

A computing system, comprising:

• a processor;
• a bus;
• and
• a segmentation and reassembly (SAR) controller coupled to the bus, comprising:
• a co-processor;
• a memory coupled to the co-processor;
• and
• logic stored in the memory for execution on the co-processor, the logic comprising:
• table generation logic, comprising:
• logic for running a simulation of the network connection to determine when each of the plurality of VCs is ready to transmit based upon a SCR step size and a SCR step sum, wherein each VC is assumed to have data available throughout the simulation;
• and
• logic for adding a listing to the table of each VC that is determined ready to send;
• transmit determination logic, comprising:
• logic for selecting in a round robin fashion a specific VC of the plurality of VCs from the table;
• and
• logic for comparing a second SCR step sum to a threshold value;
• transmission logic, comprising:
• logic for sending on the network connection the available data cell of the specific VC;
• and
• logic for decrementing the second SCR step-sum by the threshold value and
• update logic, comprising:
• logic for incrementing the second SCR step sum of each VC by the corresponding SCR step size.