Repair circuit of semiconductor memory device

Abstract

A repair circuit of a semiconductor memory device utilizes a plurality of current blocking circuits, each provided with a programmable anti-fuse, to reduce current consumption in DRAM devices, particularly during a normal operation mode. The repair circuit includes a first operation switch having an output for outputting a supply voltage in accordance with a CAS-before-RAS signal; a first fuse selector, including a first plurality of fuses connected to the output of the first operation switch, to output a sub-block select signal in accordance with the output voltage of the first operation switch and a spare column enable signal; a second operation switch having an output for outputting the supply voltage in accordance with the sub-block select signal output from the first fuse selector and an address transition detection signal for performing a pre-charge function during a normal operation mode of a DRAM device; and a second fuse selector, including a second plurality of fuses connected to the output of the second operation switch, to generate a repair column select signal in accordance with the sub-block select signal output from the first fuse selector. The current blocking circuit generate a repair value signal for controlling the operation of one or the other operation switch based on a programming status of the anti-fuse.

Dependencies are inferred from the claim text.