Memory cell string structure of a flash memory device
AssigneeSamsung Electronics Co., Ltd.
InventorSeok-Cheon Kwon
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorSeok-Cheon Kwon
Estimating the term…
A nonvolatile semiconductor memory device includes a memory cell array divided into a plurality of memory blocks. A plurality of bit lines are arranged through the plurality of memory blocks, and a plurality of word lines are arranged in each of the memory blocks so as to intersect the bit lines. Each of the memory blocks includes a plurality of memory cell strings corresponding to the bit lines. Each memory cell string includes a first string segment having a plurality of EEPROM cells and a second string segment having a plurality of EEPROM cells. A first select transistor connects the first string segment to a corresponding bit line in response to a first select signal. A second select transistor connects the first string segment to the second string segment in response to a second select signal. And a third select transistor connects the second string segment to a common source line in response to a third select signal.
A nonvolatile semiconductor memory device comprising:
A method of programming a selected memory cell in a first string segment of a selected memory cell string independently of memory cells in a second string segment of the selected memory cell string to avoid creating a pass voltage stress in the memory cells of the second string segment, said method comprising:
A method of reducing pass voltage stress in a semiconductor memory device having a plurality of string segments by performing an operation on a first string segment of the memory device independent of a second string segment of the memory device, said method comprising:
Dependencies are inferred from the claim text.