High speed sensing to detect write protect state in a flash memory device
AssigneeAdvanced Micro Devices, Inc.
InventorsLee Edward Cleveland, Kendra Nguyen
Life of this patent
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Abstract
A flash memory device (100) includes a core cell array including two banks (194, 196) of core cells and address decoding circuitry (112, 114, 118, 120) and a write protect circuit. The write protect circuit includes sector write protect circuits (210) associated with respective sectors (202) of the core cell array in storing write protect data for the associated sector. The write protect circuit further includes a switch circuit (404) which selects one sector write protect signal in response to a write select signal to produce a combined write protect signal. The write protect circuit further includes an output circuit (406) coupled to the switch circuit to produce a sector write protect signal.
Claims14
A method for operating a memory device, the method comprising:
- generating a plurality of group write protect signals (qWPOUT) when a selected sector of a group of sectors is write protected;
- generating a sector write protect signal (WPSB) in response to the group write protect signals (qWPOUT) and a group write select signal (qBWSEL), said group write select signal (qBWSEL) switching a plurality of said group write protect signals (qWPOUT);
- and
- inhibiting writing data in the selected sector in response to the sector write protect signal (WPSB).
A memory device comprising:
- a core cell array including a plurality of sectors of core cells;
- address decoding circuitry to generate a sector enable signal (SELx);
- a write protect circuit, including
- a plurality of sector write protect blocks, each sector write protect block configured to store write protect data for an associated sector and having a sector write protect output (COUT), said sector write protect outputs (COUT) being combined into a plurality of group write protect signals (UWPOUT, LWPOUT),
- a switch circuit configured to select one group write protect signal (UWPOUT, LWPOUT) in response to a write select signal (UBWSEL, LBWSEL) and producing a combined write protect signal (COUTR),
- an output circuit coupled to the switch circuit to produce a sector write protect signal (WPSB) in response to the combined write protect signal (COUTR);
- and
- a write circuit to selectively write data to a sector defined at least in part by the sector enable signal (SELx) except upon the occurrence of the sector write protect signal (WPSB).
A memory device comprising:
- a plurality of sectors of memory core cells;
- addressing means for generating a sector enable latch signal (SELx) for selecting one sector of the plurality of sectors;
- write protect means for producing a sector write protect signal, including
- a plurality of write protect data storage means for storing write protect data for each respective sector and generating a sector write protect output signal (COUT),
- combining means for combining sector write protect output signals (COUT) from a first group of write protect data storage means (SELx) to produce a first group write protect signal (UWPOUT) and for combining sector write protect output signals (COUT) from a second group of write protect data storage means (SELx) to produce a second group write protect signal (LWPOUT),
- selecting means for selecting one of the first group write protect signal (UWPOUT) and the second group write protect signal (LWPOUT) to produce a combined write protect signal (COUTR),
- output means for producing a sector write protect signal (WPSB) in response to the combined write protect signal (COUTR);
- and
- write means for writing data to core cells of a selected sector except in the presence of the sector write protect signal.
Dependencies are inferred from the claim text.