US 6,285,404 B1 · Systolic video encoding system

Abstract

A systolic video encoding system processes image data from a frame buffer at a core clock rate that is independent of the sample rate of the image data. The video encoder of this invention uses the core clock rate of the host image processing system to process image from the frame buffer at this core clock rate. The image data is pumped out of the frame buffer, processed by each of the processes of the video encoder when the data reaches each of the processes, and the encoded samples are stored in a raster sample buffer for subsequent processing. The image data is continually pumped out of the frame buffer at the core clock rate until the raster sample buffer is full. As the samples are extracted from the raster sample buffer, subsequent image data is pumped into the video encoding system, producing a systolic processing effect. By allowing operation at a core clock rate that is independent of, and substantially higher than, the image sample rate, elements of the system can be used in a time-shared manner, thereby reducing the cost and size of the video encoding system.

Claims20

Dependent claims

A video encoding system comprising:

a frame buffer system that provides image data at a core clock rate,
a video encoder, operably coupled to the frame buffer system, that processes the image data from the frame buffer system at the core clock rate, to form raster encoded sample data corresponding to a sampling rate that is independent of the core clock rate, and
a raster sample buffer, operably coupled to the video encoder, for storing the raster encoded sample data.

A video encoder for encoding image data, the video encoder comprising:

a timing control that receives a core clock signal and produces therefrom a quadrature control signal and a discrete time oscillator control signal,
a discrete time oscillator, operably coupled to the timing control, that produces a sample phase value in response to the discrete time oscillator control signal,
a quadrature generator, operably coupled to the discrete time oscillator and the timing control, that produces a phase value and a quadrature value in dependence upon the sample phase value and the quadrature control signal,
a factor memory that provides a phase factor value corresponding to a phase index,
a table lookup, operably coupled to the quadrature generator and the factor memory, that produces the phase index in dependence upon the phase value and the quadrature value, and provides a factor value in dependence upon the phase factor value and the quadrature value, and
an arithmetic unit, operably coupled to the table lookup, that provides raster encoded sample data corresponding to the image data by modulating at least one component of the image data by the factor value.

3 more elements

Dependencies are inferred from the claim text.

Systolic video encoding system

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Systolic video encoding system

Life of this patent

Abstract

Claims20