Gate control circuit for voltage drive switching element

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to the gate terminal of the respective insulated gate semiconductor device via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and said second switch is turned off;
• and
• a second DC power source coupled to said gate terminal of the respective insulated gate semiconductor device via a second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• wherein an off gate current applied by said second DC power source is greater than an on gate current applied by said first DC power source;
• a gate resistor coupled between said gate terminal and said first DC power source such that said first DC power source applies said positive voltage to said gate terminal via said gate resistor in order to turn on said insulated gate semiconductor device;
• and
• a series circuit coupled in parallel with said gate resistor, said series circuit comprising a diode coupled in series with a parallel circuit of a capacitor and a resistor.

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to said gate terminal via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and a second switch is turned off;
• a second DC power source coupled to said gate terminal via said second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• and
• a turn off assist circuit configured to produce a negative charge on said capacitor to assist in turning off said insulated gate semiconductor device;
• wherein said turn off assist circuit comprises:
• a third switch coupled between a junction between said first and second DC power sources and a terminal of said capacitor;
• and
• a fourth switch coupled between said diode and said junction between said terminal of said capacitor and said third switch.

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to said gate terminal via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and a second switch is turned off;
• a second DC power source coupled to said gate terminal via said second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• and
• a turn off assist circuit configured to produce a negative charge on said capacitor to assist in turning off said insulated gate semiconductor device;
• wherein said turn off assist circuit charges said capacitor less than an amount which can turn off said insulated gate semiconductor device.

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to said gate terminal via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and a second switch is turned off;
• a second DC power source coupled to said gate terminal via said second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• a turn off assist circuit configured to produce a negative charge on said capacitor to assist in turning off said insulated gate semiconductor device;
• and
• a resistor coupled to series with said third DC power source to control the charging time of said capacitor.

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to said gate terminal via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and a second switch is turned off;
• a second DC power source coupled to said gate terminal via said second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• and
• a turn off assist circuit configured to produce a negative charge on said capacitor to assist in turning off said insulated gate semiconductor device;
• wherein said turn off assist circuit comprises:
• a coil coupled in series with a third switch across said first DC power source and having a terminal coupled to said capacitor, said coil configured to be given energy by said first DC power source via said third switch during turn on of said insulated gate semiconductor device and to charge said capacitor to assist in turning off said insulated gate semiconductor device during turn off of said insulated gate semiconductor device.

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to said gate terminal via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and a second switch is turned off;
• a second DC power source coupled to said gate terminal via said second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• and
• a turn off assist circuit configured to produce a negative charge on said capacitor to assist in turning off said insulated gate semiconductor device;
• wherein said turn off assist circuit comprises:
• a coil coupled in series with a third switch across said second DC power source and having a terminal coupled to said capacitor, said coil configured to be given energy by said second DC power source via said third switch during turn on of said insulated gate semiconductor device and to charge said capacitor to assist in turning off said insulated gate semiconductor device during turn off of said insulated gate semiconductor device.

A power converter circuit having a plurality of insulated gate semiconductor devices, each insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a plurality of current sensors configured to detect currents flowing in respective of said insulated gate semiconductor devices;
• a plurality of gate control circuits configured to turn on and off respective of said insulated gate semiconductor devices, each of said gate control circuits comprising,
• a first DC power source coupled to the gate terminal of the respective insulated gate semiconductor device via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and said second switch is turned off,
• a second DC power source coupled to said gate terminal of the respective insulated gate semiconductor device via a second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off, and
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• and
• a setter configured to receive outputs of said sensors and based on the currents detected by said sensors to determine turn-off times of said insulated gate semiconductor devices, said setter controlling an amount of charge stored in each of said capacitors such that, when one of said turn-off times of one of said insulated gate semiconductor devices is late, said setter increases the amount of charge stored in the capacitor corresponding to said one of said insulated gate semiconductor devices.

A power converter circuit having a plurality of insulated gate semiconductor devices, each said insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a plurality of voltage sensors configured to detect collector-emitter voltages across said insulated gate semiconductor devices;
• a plurality of gate control circuits for turning on and off respective of said insulated gate semiconductor devices, each of said gate control circuits comprising,
• a first DC power source coupled to the gate terminal of the respective insulated gate semiconductor device via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and said second switch is turned off,
• a second DC power source coupled to said gate terminal of the respective insulated gate semiconductor device via a second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off, and
• a parallel circuit of a diode and a capacitor coupled in series to said second switch;
• and
• a setter configured to receive outputs of said sensors and based on the voltages detected by said sensors to determine turn-off times of said insulated gate semiconductor devices, said setter controlling an amount of charge stored in each of said capacitors such that, when one of said turn-off times of one of said insulated gate semiconductor devices is late, said setter increases the amount of charge stored in the capacitor corresponding to said one of said insulated gate semiconductor devices.

A gate control circuit for turning on and off an insulated gate semiconductor device having a collector terminal, an emitter terminal and a gate terminal, comprising:

• a first DC power source coupled to the gate terminal of the respective insulated gate semiconductor device via a first switch and configured to apply a positive voltage to said gate terminal in order to turn on said insulated gate semiconductor device when said first switch is turned on and said second switch is turned off;
• a second DC power source coupled to said gate terminal of the respective insulated gate semiconductor device via a second switch and configured to apply a negative voltage to said gate terminal in order to turn off said insulated gate semiconductor device when said second switch is turned on and said first switch is turned off;
• a series circuit of a resistor and a third switch coupled between said gate terminal and said emitter terminal,
• wherein said third switch is turned on at the time said insulated gate semiconductor device is turned on, and said third switch is turned off at the time said insulated gate semiconductor device is turned off.