Test carrier with force applying mechanism guide and terminal contact protector

A test carrier for a semiconductor component having a plurality of first contacts comprising:

• a molded plastic base;
• an interconnect on the base comprising a plurality of second contacts configured to make temporary electrical connections with the first contacts on the component;
• a force applying mechanism comprising a clamp having opposed sides and a spring configured to bias the component and the interconnect together;
• and
• a guide mechanism molded on the base configured to form a unitary structure comprising opposed channels configured to engage the sides of the clamp during assembly of the test carrier to align the force applying mechanism on the base.

A test carrier for a semiconductor component having a plurality of first contacts comprising:

• an interconnect comprising a plurality of second contacts configured to make temporary electrical connections with the first contacts on the component;
• a force applying mechanism comprising a clamp having opposed sides, tabs on the sides, and a spring configured to bias the component against the interconnect;
• and
• a base comprising a guide mechanism configured to align the force applying mechanism on the base during assembly of the carrier and to protect the force applying mechanism following assembly of the carrier, the guide mechanism comprising opposed guide channels configured to align the clamp on the base as the clamp is slid along the channels and to move the sides of the clamp towards one another, and a pair of slots proximate to the channels configured to engage the tabs to attach the clamp to the guide mechanism.

A test carrier for a semiconductor component having a plurality of first contacts comprising:

• a base;
• an interconnect on the base comprising a plurality of second contacts configured to make temporary electrical connections with the first contacts on the component;
• a force applying mechanism comprising a clamp having opposed sides with tabs thereon, and a spring attached to the clamp configured to bias the component against the interconnect;
• and
• a guide mechanism on the base comprising opposed guide channels configured to engage the clamp to align the force applying mechanism on the base, the guide channels including first slots configured to retain the tabs to attach the clamp to the guide mechanism and second slots configured to release the tabs for separating the clamp from the guide mechanism.

A test carrier for a semiconductor component comprising:

• a base comprising a guide mechanism having opposed guide channels, the base and the guide mechanism formed as unitary molded plastic structure;
• an interconnect on the base configured to make temporary electrical connections with the component;
• and
• a force applying mechanism attachable to the base comprising a clamp having opposed sides and a spring attached to the clamp configured to bias the component against the interconnect, the sides insertable into the guide channels during assembly of the carrier to align the force applying mechanism on the base.

A test carrier for a semiconductor component having a plurality of first contacts comprising:

• a base comprising a plurality of terminal contacts and a protector configured to protect the terminal contacts;
• an interconnect on the base comprising a plurality of second contacts in electrical communication with the terminal contacts configured to electrically engage the first contacts on the component;
• a guide mechanism on the base comprising opposed inclined guide channels and slots proximate to the guide channels;
• and
• a force applying mechanism comprising a biasing member for biasing the component against the interconnect, and a clamp comprising opposed sides each having a tab;
• the guide channels configured to engage the sides to align the force applying mechanism on the base, the tabs configured to engage the slots to secure the force applying mechanism to the base.

A test carrier for a semiconductor component comprising:

• a base comprising a plurality of terminal contacts;
• an interconnect on the base in electrical communication with the terminal contacts and configured to make temporary electrical connections with the component;
• a terminal contact protector on the base for protecting the terminal contacts;
• a force applying mechanism on the base comprising a clamp having opposed sides, tabs on the sides, and a spring on the clamp configured to bias the component and the interconnect together;
• and
• a guide mechanism on the base comprising opposed channels configured to engage the sides of the clamp to align the force applying mechanism on the base and slots configured to engage the tabs to attach the clamp to the base;
• the base, the terminal contact protector and the guide mechanism comprising a molded plastic unitary structure.

A method for testing a semiconductor component comprising:

• providing a test carrier comprising a base, an interconnect for making temporary electrical connections with the component, a force applying mechanism for biasing the component and the interconnect together, and a guide mechanism for aligning the force applying mechanism on the base;
• the force applying mechanism comprising a clamp having opposed sides, tabs on the sides, and a spring on the clamp configured to bias the component and the interconnect together;
• the guide mechanism comprising opposed channels configured to align the clamp on the base as the clamp is slid along the channels and to move the sides of the clamp towards one another, and a pair of slots proximate to the channels configured to engage the tabs to attach the clamp to the guide mechanism;
• aligning and attaching the force applying mechanism on the base using the guide mechanism;
• placing the component in contact with the interconnect;
• and
• applying test signals through the interconnect to the component.

A method for testing a semiconductor component having a plurality of first contacts comprising:

• providing a test carrier comprising:
• a molded plastic base,
• an interconnect on the base comprising a plurality of second contacts configured to make temporary electrical connections with the first contacts on the component,
• a force applying mechanism comprising a clamp having opposed sides and a spring for biasing the component and the interconnect together, and
• a guide mechanism molded on the base to form a unitary structure comprising opposed channels configured to engage the sides of the clamp during assembly of the test carrier to align the force applying mechanism on the base;
• assembling the test carrier using the guide mechanism to align the force applying mechanism on the base;
• and
• applying test signals through the second contacts on the interconnect to the first contacts on the component.

A method for testing a semiconductor component comprising:

• providing a test carrier comprising:
• a base,
• an interconnect on the base comprising a plurality of first contacts for making temporary electrical connections with a plurality of second contacts on the component,
• a force applying mechanism on the base comprising a clamp and a spring for biasing the component and the interconnect together, and
• a guide mechanism on the base for aligning the force applying mechanism with respect to the interconnect during assembly of the test carrier, the guide mechanism comprising a cavity for substantially enclosing the force applying, a guide channel for engaging the clamp, a first slot for attaching the clamp to the guide mechanism and a second slot for releasing the clamp from the guide mechanism;
• attaching the clamp to the base using the guide channel to align the force applying mechanism, the cavity to protect the force applying mechanism, and the first slot to attach the force applying mechanism to the guide mechanism;
• applying test signals through the interconnect to the component;
• and
• detaching the force applying mechanism from the guide mechanism using the second slot.

A system for testing a semiconductor component having a plurality of first contacts comprising:

• a test board in electrical communication with test circuitry configured to generate and analyze test signals;
• a test carrier configured to package and electrically connect the component to the test board, the test carrier comprising:
• a base;
• an interconnect on the base comprising a plurality of second contacts configured to make temporary electrical connections with the first contacts on the component;
• a force applying mechanism comprising a clamp having opposed sides, tabs on the sides, and a spring on the clamp configured to bias the component and the interconnect together;
• and
• a guide mechanism on the base comprising opposed channels configured to align the clamp on the base as the clamp is slid along the channels and to move the sides of the clamp towards one another, and a pair of slots proximate to the channels configured to engage the tabs to attach the clamp to the guide mechanism.