Method and apparatus for capacitively testing a semiconductor die
AssigneeMicron Technology, Inc.
InventorsWarren M. Farnworth, Salman Akram
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsWarren M. Farnworth, Salman Akram
Estimating the term…
An apparatus, process for forming an apparatus, and method for testing a semiconductor die having first and second die terminals. The apparatus includes a substrate having a coefficient of thermal expansion approximately equal to a thermal expansion coefficient of the die. The substrate includes first and second test terminals positioned on a surface of the substrate and positionable proximate to the die. The first test terminal is a conductive portion aligned with and spaced apart from a conductive portion of the first die terminal when the substrate is positioned proximate to the die. The first test terminal is coupleable to a variable power source current to generate a variable signal at the first test terminal and capacitively generate a corresponding signal at the first die terminal. The second test terminal is aligned with the second die terminal when the conductive portion of the first test terminal is aligned with the first die terminal.
An apparatus for testing a semiconductor die having first and second die terminals, the apparatus comprising:
An apparatus for testing a semiconductor die having first and second die terminals, the apparatus comprising:
An apparatus for testing a semiconductor die having first and second die terminals, the apparatus comprising:
A test apparatus for capacitively testing a semiconductor die having a first and second die terminals, produced by a process comprising:
A test apparatus for capacitively testing a semiconductor die having first and second die terminals, produced by a process comprising:
Dependencies are inferred from the claim text.