Semiconductor device with self-aligned contact and its manufacture

A semiconductor device having a memory cell area and a peripheral circuit area on a semiconductor substrate, comprising:

• a transfer transistor in the memory cell area including a pair of impurity diffusion regions formed in said substrate and a gate electrode formed over a surface of said substrate between said pair of impurity diffusion regions;
• a first insulating film formed on said substrate covering said transfer transistor;
• a first contact hole formed through said first insulating film and reaching one of said pair of impurity diffusion regions;
• a conductive plug embedded in said first contact hole;
• a second insulating film formed on said first insulating film covering said conductive plug;
• a second contact hole formed through said first and second insulating films and reaching the other of said pair of impurity diffusion regions;
• a bit line extending on said second insulating film and connected via said second contact hole to the other of said pair of impurity diffusion regions;
• a third insulating film covering an upper and a side surfaces of said bit line;
• an aperture formed through said second insulating film on said conductive plug, being aligned with the third insulating film covering the side surface of said bit line;
• a storage electrode electrically insulated from said bit line by said second and third insulating films, and electrically connected to said conductive plug through said aperture;
• a dielectric film formed on a surface of said storage electrode;
• and
• an opposing electrode formed on a surface of said dielectric film.

A semiconductor device comprising:

• a semiconductor substrate;
• a conductive layer disposed on said substrate;
• a first etching stopper film formed on said conductive layer;
• a first insulating film formed on said first etching stopper film;
• a second etching stopper film formed on said first insulating film;
• and
• a second insulating film formed on said second etching stopper film,
• wherein said second etching stopper film is thicker than said first etching stopper film, and said second insulating film is thicker than said first insulating film.