Method of etching silicon wafer and silicon wafer

A method of etching a silicon wafer composed of a p-type layer and an n-type layer by immersing the silicon wafer in an anisotropic etching solution, the method comprising:

• a step of anisotropically etching a part of the p-type layer by a predetermined depth;
• a step of applying a first positive voltage to the n-type layer, whereby, when an etching face in the p-type layer makes contact with a depletion layer extending from a pn junction between the p-type layer and the n-type layer, the etching face contacting the depletion layer is subjected to anodic oxidation;
• and
• a step of applying a second positive voltage to the p-type layer to cause anodic oxidation on the entire etching face of the p-type layer, whereby the entire etching face is isotropically etched in the anisotropic etching solution.

A method of etching a silicon wafer, comprising;

• immersing a silicon wafer in an anisotropic etching solution;
• anisotropically etching the silicon wafer to form a recess portion on the silicon wafer, an entirety of the recess portion being contained in a single portion of the silicon wafer, the single portion having one conductivity type;
• and
• isotropically etching at least two inner walls defining a corner of the recess portion in the anisotropic etching solution to round the corner by applying a voltage to the two inner walls having the one conductivity type directly.

A method of etching a semiconductor wafer, comprising:

• preparing a semiconductor wafer having a P type layer exposed on a surface of the semiconductor wafer and an N type layer, the P type layer and the N type layer forming a PN junction at a first depth of the silicon wafer;
• anisotropically etching the P type layer to form, in the P type layer, a recess portion having a second depth shallower than the first depth;
• and
• isotropically etching at least two inner walls defining a corner of the recess portion by applying a voltage to the P type layer.

A method of etching a semiconductor wafer, comprising:

• immersing a semiconductor wafer into an anisotropic etching solution;
• anisotropically etching the semiconductor wafer to form a recess portion;
• applying a voltage between the anisotropic etching solution and the semiconductor wafer to form an oxide film on an entire area of a bottom face and a side face defining the recess portion;
• and
• etching the oxide film by the anisotropic etching solution to round a comer of the recess portion defined between the bottom face and the side face.