Method and apparatus for the selective doping of semiconductor material by ion implantation

A method of forming bipolar transistors with good dynamic performance, at least one transistor being of the vertical npn type and at least one transistor being of the lateral pnp type, in a first region and in a second region of a layer, doped with n-type impurities, of a wafer of semiconductor material, comprising:

• a) forming a first layer of polycrystalline silicon doped with p-type impurities in the first region and in the second region;
• b) forming a second layer of dielectric material on the first layer of polycrystalline silicon;
• c) selectively etching the superimposed first and second layers so as to form a first opening and a second opening which are rectilinear, elongate and parallel to one another and which terminate in a first area and in a second area of the first and second regions, respectively, which are intended to delimit, on the surface, a portion of the base region of the vertical npn transistor, and the base region of the lateral pnp transistor, respectively;
• d) subjecting the wafer to a high-temperature treatment in an oxidizing atmosphere so as to cause some of the p-type impurities contained in the doped polycrystalline silicon layer to diffuse into the first region and into the second region, so as to produce emitter and collector regions of the pnp lateral transistor at the sides of the second opening and portions of the base region of the vertical npn transistor at the sides of the first opening and to form a layer of silicon dioxide on the first area and on the second area;
• e) subjecting the wafer to ion implantation with p-type impurities with the use of two ion beams which are directed in directions substantially perpendicular to the longitudinal axes of the first opening and of the second opening and which are inclined to the surface of the wafer at two predetermined angles so as to strike the openings from two opposite sides, the thickness of the polycrystalline silicon layer, the widths of the openings, and the angles of inclination of the ion beams being selected in a manner such that the beams strike the base of the first opening for substantially uniform doping of the underlying area of the wafer, but do not strike the base of the second opening so as to dope the first region, between the above-mentioned portions of the base region, to form the intrinsic base region of the vertical npn transistor, without doping the base region of the lateral pnp transistor;
• f) forming an n-type emitter region in the intrinsic base region of the vertical npn transistor;
• and
• g) forming metal electrodes on the emitter, base and collector regions of the npn and pnp transistors.