Semiconductor device fabrication method
AssigneeNEC Corporation
InventorMasaru Ushiroda
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AssigneeNEC Corporation
InventorMasaru Ushiroda
Estimating the term…
In order to define region in which a bipolar transistor is formed, region in which a MOS transistor is formed, and another predetermined region upon a substrate of p-type silicon, the substrate is selectively oxidized (by the LOCOS method). An element isolation region 200-500 nm thick is thereby formed. Then, a silicon oxide film 550 nm thick on the substrate, a silicon nitride film (an oxidation-resistant film) 100-300 nm thick, and a silicon oxide film 5-50 nm thick are formed. Thereafter, a publicly known photolithographic technique is used to form a photoresist pattern having an opening, and then, using the pattern as a mask, the silicon oxide film on the opening is removed. The bipolar transistor and the MOS transistor are thereby integrated in a monolithic manner without degrading the characteristics of the respective elements.
A semiconductor device fabrication method comprising:
A method of fabricating bipolar devices and MOS devices together on a same semiconductor substrate, comprising:
A method of fabricating one or more bipolar devices in a first region of a semiconductor substrate together with one or more MOS devices on said substrate, said method comprising:
Dependencies are inferred from the claim text.