Method for providing dual work function doping and protective insulating cap

A method for providing dual work function doping, the method comprising:

• providing a semiconductor substrate, a gate insulator, a conductor comprising intrinsic polysilicon and overlying silicide layer on said semiconductor substrate and an insulating cap on said conductor;
• providing insulating spacers comprising spacer material along sides of said silicide layer and said insulating cap;
• doping first portions of said conductor with a first conductive type dopant and second portions of said conductor with a second conductive type dopant;
• and
• annealing said conductor such that dopants of said first and second conductive types spread over said respective conductors,
• wherein after providing the insulating spacers and prior to doping, the method further comprises etching said intrinsic conductor at areas of the conductor not covered by said spacer material.

A method of forming dual work function doping, the method comprising:

• providing a semiconductor substrate, a gate insulator layer, a relatively undoped polysilicon layer on the semiconductor substrate, a highly conductive silicide layer and an insulating cap on said silicide layer;
• patterning said silicide and said insulating cap so as to etch through said silicide layer and said insulating cap while leaving a portion of said intrinsic polysilicon;
• providing insulating spacers comprising spacer material on sidewalls of said insulating cap and said silicide layer and so as to rest on top of said intrinsic polysilicon layer;
• etching portions of said relatively undoped polysilicon layer which are not covered by the spacer material;
• removing the spacer material such that said relatively undoped polysilicon layer includes first and second exposed portions;
• doping first exposed portions of said polysilicon layer with a first conductive type dopant;
• doping second exposed portions of said polysilicon layer with a second conductive type dopant;
• and
• annealing the polysilicon layer such that remaining portions of said polysilicon layer become doped with said first and second conductive types.

A method of forming dual work function doping, the method comprising:

• providing a semiconductor substrate, a gate insulator layer, a relatively undoped polysilicon layer on the semiconductor substrate, a highly conductive silicide layer and an insulating cap on said silicide layer;
• forming an oxide layer on portions of said semiconductor substrate not covered with said polysilicon layer;
• providing insulating spacers comprising spacer material on sidewalls of said insulating cap and said silicide layer;
• etching portions of said relatively undoped polysilicon layer which are not covered by the spacer material;
• removing the spacer material such that said relatively undoped polysilicon layer includes first and second exposed portions;
• doping first exposed portions of said polysilicon layer with a first conductive type dopant;
• doping second exposed portions of said polysilicon layer with a second conductive type dopant;
• and
• annealing the polysilicon layer such that remaining portions of said polysilicon layer become doped with said first and second conductive types.

A method for providing dual workfunction doping, the method comprising:

• providing a semiconductor substrate, a gate insulator over said semiconductor substrate and conductors comprising a deposited semiconductor material over said gate insulator;
• doping first portions of said semiconductor substrate and first ones of said conductors with a first conductive type dopant and second portions of said semiconductor substrate and second ones of said conductors with a second conductive type dopant;
• and
• annealing said conductors such that said first and second dopants spread over said respective first and second conductors.

A method for providing dual work function doping, the method comprising:

• providing a semiconductor substrate, a gate insulator, a conductor comprising intrinsic polysilicon and overlying silicide layer on said semiconductor substrate and an insulating cap on said conductor;
• patterning said silicide layer and said insulating cap;
• providing insulating spacers comprising spacer material along sides of said silicide layer and said insulating cap;
• doping first portions of said conductor with a first conductive type dopant and second portions of said conductor with a second conductive type dopant;
• and
• annealing said conductor such that dopants of said first and second conductive types spread over said respective conductors,
• wherein said intrinsic polysilicon is left unetched during processing of the method, such that said intrinsic polysilicon protects an upper surface of the semiconductor substrate in an array region of said substrate during a doping of a source and a drain in a support region of said semiconductor substrate.

A method for providing dual work function doping, the method comprising:

• providing a semiconductor substrate, a gate insulator, a conductor comprising intrinsic polysilicon and overlying silicide layer on said semiconductor substrate and an insulating cap on said conductor;
• patterning said silicide layer and said insulating cap;
• providing insulating spacers comprising spacer material along sides of said silicide layer and said insulating cap;
• doping first portions of said conductor with a first conductive type dopant and second portions of said conductor with a second conductive type dopant;
• and
• annealing said conductor such that dopants of said first and second conductive types spread over said respective conductors,
• wherein a gate stack including said intrinsic polysilicon, said silicide layer and said insulating cap is only partially etched such that etching is performed only through the silicide layer and said insulating cap.

A method for providing dual work function doping, the method comprising:

• providing a semiconductor substrate, a gate insulator, a conductor comprising intrinsic polysilicon and overlying silicide layer on said semiconductor substrate and an insulating cap on said conductor;
• patterning said silicide layer and said insulating cap;
• providing insulating spacers comprising spacer material along sides of said silicide layer and said insulating cap;
• doping first portions of said conductor with a first conductive type dopant and second portions of said conductor with a second conductive type dopant;
• and
• annealing said conductor such that dopants of said first and second conductive types spread over said respective conductors,
• wherein said insulating spacers are formed only on the sidewall of a gate stack formed by said silicide layer and said insulating cap, and
• wherein doping occurs only through a horizontal surface of said intrinsic polysilicon and without going through sidewalls of said intrinsic polysilicon.