Circuit and assembly with selectable resistance low voltage differential signal receiver

An electronic circuit assembly comprising:

• a substrate;
• a plurality of integrated circuit chips connected to the substrate;
• each chip having a low voltage differential signaling receiver (LVDS);
• the receiver of each chip having a first input line and a second input line, and an output line;
• the first input line of each receiver being connected to a first conductor on the substrate;
• the second input line of each receiver being connected to a second conductor on the substrate;
• the second input line of the receiver of a selected one of the chips being connected to the first conductor via a resistor on the chip;
• the second input lines of the receivers of the chips other than the selected one chip being electrically isolated from the first conductor;
• and
• wherein each chip is a print head defining an array of orifices.

An ink jet print head assembly comprising:

• a substrate;
• a plurality of ink jet print heads each having an array of orifices, the chips connected to the substrate;
• each print head having a low voltage differential signaling receiver (LVDS);
• each print head having first, second and third input nodes connected to the receiver on the chip;
• a resistor on each print head connected between the second input node and the third input node;
• the first input node of each print head being connected to a first conductor on the substrate;
• the second input node of a selected one of the print heads being connected to the first conductor via a resistor on the selected print head;
• and
• the third input node of each print head being connected to a second conductor on the substrate.