Current mirror circuit
AssigneeTexas Instruments Tucson Corporation
InventorsKenneth W. Murray, Joel M. Halbert
Life of this patent
Estimating the term…
Abstract
A current mirror circuit in accordance with the present invention overcomes many shortcomings of the prior art. A current mirror circuit for providing a current reference signal suitably includes at least one degeneration resistor to provide more degeneration for lower voltage noise while also including at least one clamping device to preventing saturation of the current mirror. The clamping device suitably comprises at least one diode, such as, for example, a Schottky-type diode. Moreover, the clamping device can be suitably configured to facilitate a higher slew rate of the current mirror circuit.
Claims26
A current mirror circuit for providing an output reference signal approximating an input reference signal, said current mirror circuit comprising:
- a first transistor, a collector of which is connected to said input reference signal, and a base of which is connected to its collector;
- a second transistor, a collector of which is connected to said output reference signal, and a base of which is connected to said base of said first transistor;
- a first degeneration resistor coupled to an emitter of said first transistor;
- a second degeneration resistor coupled to an emitter of said second transistor;
- a first diode connected in parallel with said first degeneration resistor;
- and
- a second diode connected in parallel with said second degeneration resistor;
- and
- wherein said first diode and said second diode operate to clamp emitter voltages of said first transistor and said second transistor to substantially prevent saturation of said current mirror circuit.
A current mirror circuit for providing an output reference approximating an input reference, said current mirror circuit comprising:
- a pair of transistors, bases of which are connected together, and a collector of each being connected to at least one of said input reference and said output reference;
- a pair of degeneration resistors, with one of said pair of degeneration resistors being coupled to an emitter of one of said pair of transistors, and the other said pair of degeneration resistor being coupled to an emitter of the other of said pair of transistors;
- a pair of diode configurations, each of said pair of diode configurations being connected in parallel with one of said pair of degeneration resistors;
- and
- wherein said pair of diode configuration operate to increase a slewing rate of said current mirror circuit.
A current mirror circuit comprising:
- a first transistor, a collector and a base of which are connected to an input reference;
- a second transistor, a collector of which is connected to an output reference, and a base of which is connected to said base of said first transistor;
- a first degeneration resistor coupled to an emitter of said first transistor;
- a second degeneration resistor coupled to an emitter of said second transistor;
- a first diode configurational connected in parallel with said first degeneration resistor;
- and
- a second diode configuration connected in parallel with said second degeneration resistor;
- wherein said first diode configuration and said second diode configuration facilitate the prevention of saturation of said current mirror circuit by clamping emitter voltages of said first transistor and said second transistor.
A current mirror circuit for providing an output reference signal approximating an input reference signal, said current mirror circuit comprising:
- a first transistor coupled to said input reference signal;
- a second transistor having a base connected to a base of said first transistor, said second transistor being further coupled to said output reference signal;
- a first degeneration resistor coupled to said first transistor;
- a second degeneration resistor coupled to said second transistor;
- a first clamping device connected in parallel with said first degeneration resistor;
- and
- a second clamping device connected in parallel with said second degeneration resistor;
- and
- wherein said first clamping device and said second clamping device operate to substantially eliminate saturation of said current mirror circuit by clamping emitter voltages of said first transistor and said second transistor during slewing of said current mirror circuit.
A circuit for providing a second reference signal approximating a first reference signal, said circuit comprising:
- a first transistor coupled to said first reference signal;
- a second transistor coupled to said second reference signal, said second transistor having a base connected to a base and a collector of said first transistor;
- a first resistor coupled to said first transistor to provide degeneration of a voltage within said first transistor;
- a second resistor coupled to said second transistor to provide degeneration of a voltage within said second transistor;
- a first diode coupled to said first transistor and said first resistor to provide clamping of an emitter voltage of said first transistor;
- and
- a second diode coupled to said second transistor and said second resistor to provide clamping of an emitter voltage of said second transistor.
A circuit for providing a second reference signal approximating a first reference signal, said circuit comprising:
- a first transistor coupled to said first reference signal;
- a second transistor coupled to said second reference signal, said second transistor having a base connected to a collector of said first transistor;
- a first resistor coupled to said first transistor to provide degeneration of a voltage within said first transistor;
- a second resistor coupled to said second transistor to provide degeneration of a voltage within said second transistor;
- a first diode configuration coupled to said first transistor and said first resistor to provide clamping of an emitter voltage of said first transistor;
- a second diode configuration coupled to said second transistor and said second resistor to provide clamping of an emitter voltage of said second transistor;
- and
- wherein at least one of said first diode configuration and said second diode configuration is connected directly in parallel with one of said first resistor and said second resistor.
Dependencies are inferred from the claim text.